xref: /linux/Documentation/devicetree/bindings/interconnect/qcom,maili-rpmh.yaml (revision 67f8bc848ee31831336bd478e57d2f993551902e)

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,maili-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm RPMh Network-On-Chip Interconnect on Maili SoC

maintainers:
  - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>

description: |
  RPMh interconnect providers support system bandwidth requirements through
  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
  able to communicate with the BCM through the Resource State Coordinator (RSC)
  associated with each execution environment. Provider nodes must point to at
  least one RPMh device child node pertaining to their RSC and each provider
  can map to multiple RPMh resources.

  See also: include/dt-bindings/interconnect/qcom,maili-rpmh.h

properties:
  compatible:
    enum:
      - qcom,maili-aggre-noc
      - qcom,maili-clk-virt
      - qcom,maili-cnoc-main
      - qcom,maili-gem-noc
      - qcom,maili-llclpi-noc
      - qcom,maili-lpass-ag-noc
      - qcom,maili-lpass-lpiaon-noc
      - qcom,maili-lpass-lpicx-noc
      - qcom,maili-mc-virt
      - qcom,maili-mmss-noc
      - qcom,maili-nsp-noc
      - qcom,maili-pcie-anoc
      - qcom,maili-stdst-cfg
      - qcom,maili-stdst-main
      - qcom,maili-system-noc

  reg:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 3

required:
  - compatible

allOf:
  - $ref: qcom,rpmh-common.yaml#
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,maili-clk-virt
              - qcom,maili-mc-virt
    then:
      properties:
        reg: false
    else:
      required:
        - reg

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,maili-aggre-noc
    then:
      properties:
        clocks:
          items:
            - description: aggre UFS PHY AXI clock
            - description: aggre USB3 PRIM AXI clock
            - description: RPMH CC IPA clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,maili-pcie-anoc
    then:
      properties:
        clocks:
          items:
            - description: aggre-NOC PCIe AXI clock
            - description: cfg-NOC PCIe a-NOC AHB clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,maili-aggre-noc
              - qcom,maili-pcie-anoc
    then:
      required:
        - clocks
    else:
      properties:
        clocks: false

unevaluatedProperties: false

examples:
  - |
    gem_noc: interconnect@31100000 {
      compatible = "qcom,maili-gem-noc";
      reg = <0x31100000 0x160200>;
      #interconnect-cells = <2>;
      qcom,bcm-voters = <&apps_bcm_voter>;
    };

    aggre_noc: interconnect@f00000 {
      compatible = "qcom,maili-aggre-noc";
      reg = <0x00f00000 0x56200>;
      #interconnect-cells = <2>;
      clocks = <&gcc_phy_axi_clk>,
               <&gcc_prim_axi_clk>,
               <&rpmhcc_ipa_clk>;
      qcom,bcm-voters = <&apps_bcm_voter>;
    };