1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,maili-rpmh.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPMh Network-On-Chip Interconnect on Maili SoC 8 9maintainers: 10 - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> 11 12description: | 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 15 able to communicate with the BCM through the Resource State Coordinator (RSC) 16 associated with each execution environment. Provider nodes must point to at 17 least one RPMh device child node pertaining to their RSC and each provider 18 can map to multiple RPMh resources. 19 20 See also: include/dt-bindings/interconnect/qcom,maili-rpmh.h 21 22properties: 23 compatible: 24 enum: 25 - qcom,maili-aggre-noc 26 - qcom,maili-clk-virt 27 - qcom,maili-cnoc-main 28 - qcom,maili-gem-noc 29 - qcom,maili-llclpi-noc 30 - qcom,maili-lpass-ag-noc 31 - qcom,maili-lpass-lpiaon-noc 32 - qcom,maili-lpass-lpicx-noc 33 - qcom,maili-mc-virt 34 - qcom,maili-mmss-noc 35 - qcom,maili-nsp-noc 36 - qcom,maili-pcie-anoc 37 - qcom,maili-stdst-cfg 38 - qcom,maili-stdst-main 39 - qcom,maili-system-noc 40 41 reg: 42 maxItems: 1 43 44 clocks: 45 minItems: 2 46 maxItems: 3 47 48required: 49 - compatible 50 51allOf: 52 - $ref: qcom,rpmh-common.yaml# 53 - if: 54 properties: 55 compatible: 56 contains: 57 enum: 58 - qcom,maili-clk-virt 59 - qcom,maili-mc-virt 60 then: 61 properties: 62 reg: false 63 else: 64 required: 65 - reg 66 67 - if: 68 properties: 69 compatible: 70 contains: 71 enum: 72 - qcom,maili-aggre-noc 73 then: 74 properties: 75 clocks: 76 items: 77 - description: aggre UFS PHY AXI clock 78 - description: aggre USB3 PRIM AXI clock 79 - description: RPMH CC IPA clock 80 81 - if: 82 properties: 83 compatible: 84 contains: 85 enum: 86 - qcom,maili-pcie-anoc 87 then: 88 properties: 89 clocks: 90 items: 91 - description: aggre-NOC PCIe AXI clock 92 - description: cfg-NOC PCIe a-NOC AHB clock 93 94 - if: 95 properties: 96 compatible: 97 contains: 98 enum: 99 - qcom,maili-aggre-noc 100 - qcom,maili-pcie-anoc 101 then: 102 required: 103 - clocks 104 else: 105 properties: 106 clocks: false 107 108unevaluatedProperties: false 109 110examples: 111 - | 112 gem_noc: interconnect@31100000 { 113 compatible = "qcom,maili-gem-noc"; 114 reg = <0x31100000 0x160200>; 115 #interconnect-cells = <2>; 116 qcom,bcm-voters = <&apps_bcm_voter>; 117 }; 118 119 aggre_noc: interconnect@f00000 { 120 compatible = "qcom,maili-aggre-noc"; 121 reg = <0x00f00000 0x56200>; 122 #interconnect-cells = <2>; 123 clocks = <&gcc_phy_axi_clk>, 124 <&gcc_prim_axi_clk>, 125 <&rpmhcc_ipa_clk>; 126 qcom,bcm-voters = <&apps_bcm_voter>; 127 }; 128