xref: /linux/Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml (revision efe86f088f48f18c27b648e5724048947f3b7fb4) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,hawi-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on Hawi
8
9maintainers:
10  - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
11
12description: |
13  RPMh interconnect providers support system bandwidth requirements through
14  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15  able to communicate with the BCM through the Resource State Coordinator (RSC)
16  associated with each execution environment. Provider nodes must point to at
17  least one RPMh device child node pertaining to their RSC and each provider
18  can map to multiple RPMh resources.
19
20  See also: include/dt-bindings/interconnect/qcom,hawi-rpmh.h
21
22properties:
23  compatible:
24    enum:
25      - qcom,hawi-aggre1-noc
26      - qcom,hawi-clk-virt
27      - qcom,hawi-cnoc-main
28      - qcom,hawi-gem-noc
29      - qcom,hawi-llclpi-noc
30      - qcom,hawi-lpass-ag-noc
31      - qcom,hawi-lpass-lpiaon-noc
32      - qcom,hawi-lpass-lpicx-noc
33      - qcom,hawi-mc-virt
34      - qcom,hawi-mmss-noc
35      - qcom,hawi-nsp-noc
36      - qcom,hawi-pcie-anoc
37      - qcom,hawi-stdst-cfg
38      - qcom,hawi-stdst-main
39      - qcom,hawi-system-noc
40
41  reg:
42    maxItems: 1
43
44  clocks:
45    minItems: 2
46    maxItems: 3
47
48required:
49  - compatible
50
51allOf:
52  - $ref: qcom,rpmh-common.yaml#
53  - if:
54      properties:
55        compatible:
56          contains:
57            enum:
58              - qcom,hawi-clk-virt
59              - qcom,hawi-mc-virt
60    then:
61      properties:
62        reg: false
63    else:
64      required:
65        - reg
66
67  - if:
68      properties:
69        compatible:
70          contains:
71            enum:
72              - qcom,hawi-pcie-anoc
73    then:
74      properties:
75        clocks:
76          items:
77            - description: aggre-NOC PCIe AXI clock
78            - description: cfg-NOC PCIe a-NOC AHB clock
79
80  - if:
81      properties:
82        compatible:
83          contains:
84            enum:
85              - qcom,hawi-aggre1-noc
86    then:
87      properties:
88        clocks:
89          items:
90            - description: aggre UFS PHY AXI clock
91            - description: aggre USB3 PRIM AXI clock
92            - description: RPMH CC IPA clock
93
94  - if:
95      properties:
96        compatible:
97          contains:
98            enum:
99              - qcom,hawi-aggre1-noc
100              - qcom,hawi-pcie-anoc
101    then:
102      required:
103        - clocks
104    else:
105      properties:
106        clocks: false
107
108unevaluatedProperties: false
109
110examples:
111  - |
112    soc {
113      #address-cells = <2>;
114      #size-cells = <2>;
115
116      clk_virt: interconnect-0 {
117        compatible = "qcom,hawi-clk-virt";
118        #interconnect-cells = <2>;
119        qcom,bcm-voters = <&apps_bcm_voter>;
120      };
121
122      aggre_noc: interconnect@f00000 {
123        compatible = "qcom,hawi-aggre1-noc";
124        reg = <0x0 0xf00000 0x0 0x54400>;
125        #interconnect-cells = <2>;
126        clocks = <&gcc_aggre_ufs_phy_axi_clk>,
127                 <&gcc_aggre_usb3_prim_axi_clk>,
128                 <&rpmhcc_ipa_clk>;
129        qcom,bcm-voters = <&apps_bcm_voter>;
130      };
131    };
132