1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2025 Analog Devices Inc. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/iio/adc/adi,ad7191.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Analog Devices AD7191 ADC 9 10maintainers: 11 - Alisa-Dariana Roman <alisa.roman@analog.com> 12 13description: | 14 Bindings for the Analog Devices AD7191 ADC device. Datasheet can be 15 found here: 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7191.pdf 17 The device's PDOWN pin must be connected to the SPI controller's chip select 18 pin. 19 20properties: 21 compatible: 22 enum: 23 - adi,ad7191 24 25 reg: 26 maxItems: 1 27 28 spi-cpol: true 29 30 spi-cpha: true 31 32 clocks: 33 maxItems: 1 34 description: 35 Must be present when CLKSEL pin is tied HIGH to select external clock 36 source (either a crystal between MCLK1 and MCLK2 pins, or a 37 CMOS-compatible clock driving MCLK2 pin). Must be absent when CLKSEL pin 38 is tied LOW to use the internal 4.92MHz clock. 39 40 interrupts: 41 maxItems: 1 42 43 avdd-supply: 44 description: AVdd voltage supply 45 46 dvdd-supply: 47 description: DVdd voltage supply 48 49 vref-supply: 50 description: Vref voltage supply 51 52 odr-gpios: 53 description: 54 ODR1 and ODR2 pins for output data rate selection. Should be defined if 55 adi,odr-value is absent. 56 minItems: 2 57 maxItems: 2 58 59 adi,odr-value: 60 $ref: /schemas/types.yaml#/definitions/uint32 61 description: | 62 Should be present if ODR pins are pin-strapped. Possible values: 63 120 Hz (ODR1=0, ODR2=0) 64 60 Hz (ODR1=0, ODR2=1) 65 50 Hz (ODR1=1, ODR2=0) 66 10 Hz (ODR1=1, ODR2=1) 67 If defined, odr-gpios must be absent. 68 enum: [120, 60, 50, 10] 69 70 pga-gpios: 71 description: 72 PGA1 and PGA2 pins for gain selection. Should be defined if adi,pga-value 73 is absent. 74 minItems: 2 75 maxItems: 2 76 77 adi,pga-value: 78 $ref: /schemas/types.yaml#/definitions/uint32 79 description: | 80 Should be present if PGA pins are pin-strapped. Possible values: 81 Gain 1 (PGA1=0, PGA2=0) 82 Gain 8 (PGA1=0, PGA2=1) 83 Gain 64 (PGA1=1, PGA2=0) 84 Gain 128 (PGA1=1, PGA2=1) 85 If defined, pga-gpios must be absent. 86 enum: [1, 8, 64, 128] 87 88 temp-gpios: 89 description: TEMP pin for temperature sensor enable. 90 maxItems: 1 91 92 chan-gpios: 93 description: CHAN pin for input channel selection. 94 maxItems: 1 95 96required: 97 - compatible 98 - reg 99 - interrupts 100 - avdd-supply 101 - dvdd-supply 102 - vref-supply 103 - spi-cpol 104 - spi-cpha 105 - temp-gpios 106 - chan-gpios 107 108allOf: 109 - $ref: /schemas/spi/spi-peripheral-props.yaml# 110 - oneOf: 111 - required: 112 - adi,odr-value 113 - required: 114 - odr-gpios 115 - oneOf: 116 - required: 117 - adi,pga-value 118 - required: 119 - pga-gpios 120 121unevaluatedProperties: false 122 123examples: 124 - | 125 #include <dt-bindings/gpio/gpio.h> 126 #include <dt-bindings/interrupt-controller/irq.h> 127 128 spi { 129 #address-cells = <1>; 130 #size-cells = <0>; 131 132 adc@0 { 133 compatible = "adi,ad7191"; 134 reg = <0>; 135 spi-max-frequency = <1000000>; 136 spi-cpol; 137 spi-cpha; 138 clocks = <&ad7191_mclk>; 139 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 140 interrupt-parent = <&gpio>; 141 avdd-supply = <&avdd>; 142 dvdd-supply = <&dvdd>; 143 vref-supply = <&vref>; 144 adi,pga-value = <1>; 145 odr-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>, <&gpio 24 GPIO_ACTIVE_HIGH>; 146 temp-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; 147 chan-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; 148 }; 149 }; 150