xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml (revision b2128290c29902315e632ea59e0504d6bc9e9b42) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD4691 Family Multichannel SAR ADCs
8
9maintainers:
10  - Radu Sabau <radu.sabau@analog.com>
11
12description: |
13  The AD4691 family are high-speed, low-power, multichannel successive
14  approximation register (SAR) analog-to-digital converters (ADCs) with
15  an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
16  where an external PWM drives the CNV pin, and Manual Mode, where CNV
17  is directly tied to the SPI chip-select.
18
19  Datasheets:
20    * https://www.analog.com/en/products/ad4691.html
21    * https://www.analog.com/en/products/ad4692.html
22    * https://www.analog.com/en/products/ad4693.html
23    * https://www.analog.com/en/products/ad4694.html
24
25$ref: /schemas/spi/spi-peripheral-props.yaml#
26
27properties:
28  compatible:
29    enum:
30      - adi,ad4691
31      - adi,ad4692
32      - adi,ad4693
33      - adi,ad4694
34
35  reg:
36    maxItems: 1
37
38  spi-max-frequency:
39    maximum: 40000000
40
41  spi-cpol: true
42  spi-cpha: true
43
44  avdd-supply:
45    description: Analog power supply (4.5V to 5.5V).
46
47  vdd-supply:
48    description:
49      External 1.8V digital core supply. When present, the internal LDO is
50      disabled (LDO_EN = 0). Mutually exclusive with ldo-in-supply.
51
52  ldo-in-supply:
53    description:
54      LDO input supply (2.4V to 5.5V). When present and vdd-supply is absent,
55      the internal LDO generates 1.8V VDD from this input (LDO_EN = 1).
56      Mutually exclusive with vdd-supply.
57
58  vio-supply:
59    description: I/O voltage supply (1.71V to 1.89V or VDD).
60
61  ref-supply:
62    description: External reference voltage supply (2.4V to 5.25V).
63
64  refin-supply:
65    description: Internal reference buffer input supply.
66
67  reset-gpios:
68    description:
69      GPIO line controlling the hardware reset pin (active-low).
70    maxItems: 1
71
72  pwms:
73    description:
74      PWM connected to the CNV pin. When present, selects CNV Burst Mode where
75      the PWM drives the conversion rate. When absent, Manual Mode is used
76      (CNV tied to SPI CS).
77    maxItems: 1
78
79  interrupts:
80    description:
81      Interrupt lines connected to the ADC GP pins. Each GP pin can be
82      physically wired to an interrupt-capable input on the SoC.
83    maxItems: 4
84
85  interrupt-names:
86    description: Names of the interrupt lines, matching the GP pin names.
87    minItems: 1
88    maxItems: 4
89    items:
90      enum:
91        - gp0
92        - gp1
93        - gp2
94        - gp3
95
96  gpio-controller: true
97
98  '#gpio-cells':
99    const: 2
100
101  '#trigger-source-cells':
102    description:
103      This node can act as a trigger source. The single cell in a consumer
104      reference specifies the GP pin number (0-3) used as the trigger output.
105    const: 1
106
107required:
108  - compatible
109  - reg
110  - avdd-supply
111  - vio-supply
112
113allOf:
114  # vdd-supply and ldo-in-supply are mutually exclusive, one is required:
115  # either an external 1.8V VDD is provided or the internal LDO is fed from
116  # ldo-in-supply to generate VDD.
117  - oneOf:
118      - required:
119          - vdd-supply
120      - required:
121          - ldo-in-supply
122  # ref-supply and refin-supply are mutually exclusive, one is required
123  - oneOf:
124      - required:
125          - ref-supply
126      - required:
127          - refin-supply
128
129unevaluatedProperties: false
130
131examples:
132  - |
133    #include <dt-bindings/gpio/gpio.h>
134    /* AD4692 in CNV Burst Mode with SPI offload */
135    spi {
136        #address-cells = <1>;
137        #size-cells = <0>;
138
139        adc@0 {
140            compatible = "adi,ad4692";
141            reg = <0>;
142            spi-cpol;
143            spi-cpha;
144            spi-max-frequency = <40000000>;
145
146            avdd-supply = <&avdd_supply>;
147            ldo-in-supply = <&avdd_supply>;
148            vio-supply = <&vio_supply>;
149            ref-supply = <&ref_5v>;
150
151            reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
152
153            pwms = <&pwm_gen 0 0>;
154
155            #trigger-source-cells = <1>;
156        };
157    };
158
159  - |
160    #include <dt-bindings/gpio/gpio.h>
161    /* AD4692 in Manual Mode (CNV tied to SPI CS) */
162    spi {
163        #address-cells = <1>;
164        #size-cells = <0>;
165
166        adc@0 {
167            compatible = "adi,ad4692";
168            reg = <0>;
169            spi-cpol;
170            spi-cpha;
171            spi-max-frequency = <31250000>;
172
173            avdd-supply = <&avdd_supply>;
174            ldo-in-supply = <&avdd_supply>;
175            vio-supply = <&vio_supply>;
176            refin-supply = <&refin_supply>;
177
178            reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
179        };
180    };
181