xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad4134.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD4134 ADC
8
9maintainers:
10  - Marcelo Schmitt <marcelo.schmitt@analog.com>
11
12description: |
13  The AD4134 is a quad channel, low noise, simultaneous sampling, precision
14  analog-to-digital converter (ADC).
15  Specifications can be found at:
16    https://www.analog.com/media/en/technical-documentation/data-sheets/ad4134.pdf
17
18$ref: /schemas/spi/spi-peripheral-props.yaml#
19
20properties:
21  compatible:
22    enum:
23      - adi,ad4134
24
25  reg:
26    maxItems: 1
27
28  spi-max-frequency:
29    maximum: 50000000
30
31  avdd5-supply:
32    description: A 5V supply that powers the chip's analog circuitry.
33
34  dvdd5-supply:
35    description: A 5V supply that powers the chip's digital circuitry.
36
37  iovdd-supply:
38    description:
39      A 1.8V supply that sets the logic levels for the digital interface pins.
40
41  refin-supply:
42    description:
43      A 4.096V or 5V supply that serves as reference for ADC conversions.
44
45  avdd1v8-supply:
46    description: A 1.8V supply used by the analog circuitry.
47
48  dvdd1v8-supply:
49    description: A 1.8V supply used by the digital circuitry.
50
51  clkvdd-supply:
52    description: A 1.8V supply for the chip's clock management circuit.
53
54  ldoin-supply:
55    description:
56      A 2.6V to 5.5V supply that generates 1.8V for AVDD1V8, DVDD1V8, and CLKVDD
57      pins.
58
59  clocks:
60    maxItems: 1
61    description:
62      Required external clock source. Can specify either a crystal or CMOS clock
63      source. If an external crystal is set, connect the CLKSEL pin to IOVDD.
64      Otherwise, connect the CLKSEL pin to IOGND and the external CMOS clock
65      signal to the XTAL2/CLKIN pin.
66
67  clock-names:
68    enum:
69      - xtal
70      - clkin
71    default: clkin
72
73  '#clock-cells':
74    const: 0
75
76  clock-output-names:
77    maxItems: 1
78
79  regulators:
80    type: object
81    description:
82      list of regulators provided by this controller.
83
84    properties:
85      vcm-output:
86        $ref: /schemas/regulator/regulator.yaml#
87        type: object
88        unevaluatedProperties: false
89
90    additionalProperties: false
91
92  reset-gpios:
93    maxItems: 1
94
95  powerdown-gpios:
96    description:
97      Active low GPIO connected to the /PDN pin. Forces the device into full
98      power-down mode when brought low. Pull this input to IOVDD for normal
99      operation.
100    maxItems: 1
101
102  odr-gpios:
103    description:
104      GPIO connected to ODR pin. Used to sample ADC data in minimum I/O mode.
105    maxItems: 1
106
107  adi,asrc-mode:
108    $ref: /schemas/types.yaml#/definitions/string
109    description:
110      Asynchronous Sample Rate Converter (ASRC) operation mode control input.
111      Describes whether the MODE pin is set to a high level (for master mode
112      operation) or to a low level (for slave mode operation).
113    enum: [ high, low ]
114    default: low
115
116  adi,dclkio:
117    description:
118      DCLK pin I/O direction control for when the device operates in Pin Control
119      Slave Mode or in SPI Control Mode. Describes if DEC0/DCLKIO pin is at a
120      high level (which configures DCLK as an output) or to set to a low level
121      (configuring DCLK for input).
122    enum: [ out, in ]
123    default: in
124
125  adi,dclkmode:
126    description:
127      DCLK mode control for when the device operates in Pin Control Slave Mode
128      or in SPI Control Mode. Describes whether the DEC1/DCLKMODE pin is set to
129      a high level (configuring the DCLK to operate in free running mode) or
130      to a low level (to configure DCLK to operate in gated mode).
131    enum: [ free-running, gated ]
132    default: gated
133
134required:
135  - compatible
136  - reg
137  - avdd5-supply
138  - dvdd5-supply
139  - iovdd-supply
140  - refin-supply
141  - clocks
142  - clock-names
143
144oneOf:
145  - required:
146      - ldoin-supply
147  - required:
148      - avdd1v8-supply
149      - dvdd1v8-supply
150      - clkvdd-supply
151
152unevaluatedProperties: false
153
154examples:
155  - |
156    #include <dt-bindings/gpio/gpio.h>
157
158    spi {
159        #address-cells = <1>;
160        #size-cells = <0>;
161
162        adc@0 {
163            compatible = "adi,ad4134";
164            reg = <0>;
165
166            spi-max-frequency = <1000000>;
167
168            reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
169            odr-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
170            powerdown-gpios = <&gpio0 88 GPIO_ACTIVE_LOW>;
171
172            clocks = <&sys_clk>;
173            clock-names = "clkin";
174
175            avdd5-supply = <&avdd5>;
176            dvdd5-supply = <&dvdd5>;
177            iovdd-supply = <&iovdd>;
178            refin-supply = <&refin>;
179            avdd1v8-supply = <&avdd1v8>;
180            dvdd1v8-supply = <&dvdd1v8>;
181            clkvdd-supply = <&clkvdd>;
182
183            regulators {
184                vcm_reg: vcm-output {
185                    regulator-name = "ad4134-vcm";
186                };
187            };
188
189        };
190    };
191...
192