xref: /linux/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs I2C controller
8
9maintainers:
10  - Paul Cercueil <paul@crapouillou.net>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14
15properties:
16  $nodename:
17    pattern: "^i2c@[0-9a-f]+$"
18
19  compatible:
20    oneOf:
21      - enum:
22          - ingenic,jz4770-i2c
23          - ingenic,x1000-i2c
24      - items:
25          - const: ingenic,jz4780-i2c
26          - const: ingenic,jz4770-i2c
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  clocks:
35    maxItems: 1
36
37  clock-frequency:
38    enum: [ 100000, 400000 ]
39
40  dmas:
41    items:
42      - description: DMA controller phandle and request line for RX
43      - description: DMA controller phandle and request line for TX
44
45  dma-names:
46    items:
47      - const: rx
48      - const: tx
49
50required:
51  - compatible
52  - reg
53  - interrupts
54  - clocks
55  - clock-frequency
56  - dmas
57  - dma-names
58
59unevaluatedProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
64    #include <dt-bindings/dma/jz4780-dma.h>
65    #include <dt-bindings/interrupt-controller/irq.h>
66    i2c@10054000 {
67      compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
68      #address-cells = <1>;
69      #size-cells = <0>;
70      reg = <0x10054000 0x1000>;
71
72      interrupts = <56 IRQ_TYPE_LEVEL_LOW>;
73
74      clocks = <&cgu JZ4780_CLK_SMB4>;
75      pinctrl-names = "default";
76      pinctrl-0 = <&pins_i2c4_data>;
77
78      dmas = <&dma JZ4780_DMA_SMB4_RX 0xffffffff>,
79             <&dma JZ4780_DMA_SMB4_TX 0xffffffff>;
80      dma-names = "rx", "tx";
81
82      clock-frequency = <400000>;
83
84      rtc@51 {
85        compatible = "nxp,pcf8563";
86        reg = <0x51>;
87
88        interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
89      };
90    };
91