xref: /linux/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml (revision 3daee2e4b3568f0ed88b0598df96547fcf21cb9b) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: I2C for Atmel/Microchip platforms
9
10maintainers:
11  - Alexandre Belloni <alexandre.belloni@bootlin.com>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - atmel,at91rm9200-i2c
19              - atmel,at91sam9261-i2c
20              - atmel,at91sam9260-i2c
21              - atmel,at91sam9g20-i2c
22              - atmel,at91sam9g10-i2c
23              - atmel,at91sam9x5-i2c
24              - atmel,sama5d4-i2c
25              - atmel,sama5d2-i2c
26              - microchip,sam9x60-i2c
27      - items:
28          - enum:
29              - microchip,sama7g5-i2c
30              - microchip,sam9x7-i2c
31          - const: microchip,sam9x60-i2c
32
33  reg:
34    maxItems: 1
35
36  interrupts:
37    maxItems: 1
38
39  "#address-cells":
40    const: 1
41
42  "#size-cells":
43    const: 0
44
45  clocks:
46    maxItems: 1
47
48  clock-frequency:
49    default: 100000
50
51  dmas:
52    items:
53      - description: TX DMA Channel Specifier
54      - description: RX DMA Channel Specifier
55
56  dma-names:
57    items:
58      - const: tx
59      - const: rx
60
61  atmel,fifo-size:
62    $ref: /schemas/types.yaml#/definitions/uint32
63    description: |
64      Maximum number of data the RX and TX FIFOs can store for
65      FIFO capable I2C controllers.
66
67  scl-gpios: true
68
69  sda-gpios: true
70
71required:
72  - compatible
73  - reg
74  - interrupts
75  - "#address-cells"
76  - "#size-cells"
77  - clocks
78
79allOf:
80  - $ref: /schemas/i2c/i2c-controller.yaml#
81  - if:
82      properties:
83        compatible:
84          contains:
85            enum:
86              - atmel,sama5d4-i2c
87              - atmel,sama5d2-i2c
88              - microchip,sam9x60-i2c
89              - microchip,sama7g5-i2c
90    then:
91      properties:
92        i2c-sda-hold-time-ns:
93          description:
94            TWD hold time
95          maxItems: 1
96
97unevaluatedProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/interrupt-controller/irq.h>
102    #include <dt-bindings/dma/at91.h>
103    #include <dt-bindings/gpio/gpio.h>
104
105    i2c0: i2c@fff84000 {
106        compatible = "atmel,at91sam9g20-i2c";
107        reg = <0xfff84000 0x100>;
108        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
109        #address-cells = <1>;
110        #size-cells = <0>;
111        clocks = <&twi0_clk>;
112        clock-frequency = <400000>;
113
114        eeprom@50 {
115            compatible = "atmel,24c512";
116            reg = <0x50>;
117            pagesize = <128>;
118        };
119    };
120
121    i2c1: i2c@f8034600 {
122        compatible = "atmel,sama5d2-i2c";
123        reg = <0xf8034600 0x100>;
124        interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
125        dmas = <&dma0
126            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
127            AT91_XDMAC_DT_PERID(11)>,
128               <&dma0
129            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
130            AT91_XDMAC_DT_PERID(12)>;
131        dma-names = "tx", "rx";
132        #address-cells = <1>;
133        #size-cells = <0>;
134        clocks = <&flx0>;
135        atmel,fifo-size = <16>;
136        i2c-sda-hold-time-ns = <336>;
137        pinctrl-names = "default", "gpio";
138        pinctrl-0 = <&pinctrl_i2c0>;
139        pinctrl-1 = <&pinctrl_i2c0_gpio>;
140        sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
141        scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
142
143        eeprom@54 {
144            compatible = "atmel,24c02";
145            reg = <0x54>;
146            pagesize = <16>;
147        };
148    };
149