xref: /linux/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: I2C for Atmel/Microchip platforms
9
10maintainers:
11  - Alexandre Belloni <alexandre.belloni@bootlin.com>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - atmel,at91rm9200-i2c
19              - atmel,at91sam9261-i2c
20              - atmel,at91sam9260-i2c
21              - atmel,at91sam9g20-i2c
22              - atmel,at91sam9g10-i2c
23              - atmel,at91sam9x5-i2c
24              - atmel,sama5d4-i2c
25              - atmel,sama5d2-i2c
26              - microchip,sam9x60-i2c
27      - items:
28          - enum:
29              - microchip,sama7d65-i2c
30              - microchip,sama7g5-i2c
31              - microchip,sam9x7-i2c
32          - const: microchip,sam9x60-i2c
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    maxItems: 1
39
40  clocks:
41    maxItems: 1
42
43  clock-frequency:
44    default: 100000
45
46  dmas:
47    items:
48      - description: TX DMA Channel Specifier
49      - description: RX DMA Channel Specifier
50
51  dma-names:
52    items:
53      - const: tx
54      - const: rx
55
56  atmel,fifo-size:
57    $ref: /schemas/types.yaml#/definitions/uint32
58    description: |
59      Maximum number of data the RX and TX FIFOs can store for
60      FIFO capable I2C controllers.
61
62  scl-gpios: true
63
64  sda-gpios: true
65
66required:
67  - compatible
68  - reg
69  - interrupts
70  - clocks
71
72allOf:
73  - $ref: /schemas/i2c/i2c-controller.yaml#
74  - if:
75      properties:
76        compatible:
77          contains:
78            enum:
79              - atmel,sama5d4-i2c
80              - atmel,sama5d2-i2c
81              - microchip,sam9x60-i2c
82              - microchip,sama7d65-i2c
83              - microchip,sama7g5-i2c
84    then:
85      properties:
86        i2c-sda-hold-time-ns:
87          description:
88            TWD hold time
89          maxItems: 1
90
91unevaluatedProperties: false
92
93examples:
94  - |
95    #include <dt-bindings/interrupt-controller/irq.h>
96    #include <dt-bindings/dma/at91.h>
97    #include <dt-bindings/gpio/gpio.h>
98
99    i2c0: i2c@fff84000 {
100        compatible = "atmel,at91sam9g20-i2c";
101        reg = <0xfff84000 0x100>;
102        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
103        #address-cells = <1>;
104        #size-cells = <0>;
105        clocks = <&twi0_clk>;
106        clock-frequency = <400000>;
107
108        eeprom@50 {
109            compatible = "atmel,24c512";
110            reg = <0x50>;
111            pagesize = <128>;
112        };
113    };
114
115    i2c1: i2c@f8034600 {
116        compatible = "atmel,sama5d2-i2c";
117        reg = <0xf8034600 0x100>;
118        interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
119        dmas = <&dma0
120            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
121            AT91_XDMAC_DT_PERID(11)>,
122               <&dma0
123            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
124            AT91_XDMAC_DT_PERID(12)>;
125        dma-names = "tx", "rx";
126        #address-cells = <1>;
127        #size-cells = <0>;
128        clocks = <&flx0>;
129        atmel,fifo-size = <16>;
130        i2c-sda-hold-time-ns = <336>;
131        pinctrl-names = "default", "gpio";
132        pinctrl-0 = <&pinctrl_i2c0>;
133        pinctrl-1 = <&pinctrl_i2c0_gpio>;
134        sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
135        scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
136
137        eeprom@54 {
138            compatible = "atmel,24c02";
139            reg = <0x54>;
140            pagesize = <16>;
141        };
142    };
143