1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/altr,softip-i2c-v1.0.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Altera I2C Controller 8 9maintainers: 10 - Thor Thayer <thor.thayer@linux.intel.com> 11 - Chaitanya Sabnis <chaitanya.msabnis@gmail.com> 12 13description: 14 Altera's synthesizable logic block I2C Controller for use in Altera's FPGAs. 15 16allOf: 17 - $ref: /schemas/i2c/i2c-controller.yaml# 18 19properties: 20 compatible: 21 const: altr,softip-i2c-v1.0 22 23 reg: 24 maxItems: 1 25 26 interrupts: 27 maxItems: 1 28 29 clocks: 30 maxItems: 1 31 32 fifo-size: 33 $ref: /schemas/types.yaml#/definitions/uint32 34 description: Size of the RX and TX FIFOs in bytes. 35 36required: 37 - compatible 38 - reg 39 - interrupts 40 - clocks 41 42unevaluatedProperties: false 43 44examples: 45 - | 46 i2c@80000 { 47 compatible = "altr,softip-i2c-v1.0"; 48 reg = <0x80000 0x40>; 49 interrupt-parent = <&intc>; 50 interrupts = <0 43 4>; 51 clocks = <&clk_0>; 52 clock-frequency = <100000>; 53 #address-cells = <1>; 54 #size-cells = <0>; 55 fifo-size = <4>; 56 57 eeprom@51 { 58 compatible = "atmel,24c32"; 59 reg = <0x51>; 60 pagesize = <32>; 61 }; 62 }; 63