1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2023 Realtek Semiconductor Corporation 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/gpio/realtek,rtd1625-gpio.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Realtek DHC RTD1625 GPIO controller 9 10maintainers: 11 - Tzuyi Chang <tychang@realtek.com> 12 13description: | 14 GPIO controller for the Realtek RTD1625 SoC, featuring a per-pin register 15 architecture that differs significantly from earlier RTD series controllers. 16 Each GPIO has dedicated registers for configuration (direction, input/output 17 values, debounce), and interrupt control supporting edge and level detection 18 modes. 19 20properties: 21 compatible: 22 enum: 23 - realtek,rtd1625-iso-gpio 24 - realtek,rtd1625-isom-gpio 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 items: 31 - description: Interrupt number of the assert GPIO interrupt, which is 32 triggered when there is a rising edge. 33 - description: Interrupt number of the deassert GPIO interrupt, which is 34 triggered when there is a falling edge. 35 - description: Interrupt number of the level-sensitive GPIO interrupt, 36 triggered by a configured logic level. 37 38 interrupt-controller: true 39 40 "#interrupt-cells": 41 const: 2 42 43 gpio-ranges: true 44 45 gpio-controller: true 46 47 "#gpio-cells": 48 const: 2 49 50required: 51 - compatible 52 - reg 53 - gpio-ranges 54 - gpio-controller 55 - "#gpio-cells" 56 57additionalProperties: false 58 59examples: 60 - | 61 gpio@89100 { 62 compatible = "realtek,rtd1625-isom-gpio"; 63 reg = <0x89100 0x30>; 64 interrupt-parent = <&iso_m_irq_mux>; 65 interrupts = <0>, <1>, <2>; 66 interrupt-controller; 67 #interrupt-cells = <2>; 68 gpio-ranges = <&isom_pinctrl 0 0 4>; 69 gpio-controller; 70 #gpio-cells = <2>; 71 }; 72