1*5c163c97SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5c163c97SRob Herring (Arm)%YAML 1.2 3*5c163c97SRob Herring (Arm)--- 4*5c163c97SRob Herring (Arm)$id: http://devicetree.org/schemas/cavium,octeon-3860-gpio.yaml# 5*5c163c97SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5c163c97SRob Herring (Arm) 7*5c163c97SRob Herring (Arm)title: Cavium Octeon 3860 GPIO controller 8*5c163c97SRob Herring (Arm) 9*5c163c97SRob Herring (Arm)maintainers: 10*5c163c97SRob Herring (Arm) - Bartosz Golaszewski <brgl@bgdev.pl> 11*5c163c97SRob Herring (Arm) 12*5c163c97SRob Herring (Arm)properties: 13*5c163c97SRob Herring (Arm) compatible: 14*5c163c97SRob Herring (Arm) const: cavium,octeon-3860-gpio 15*5c163c97SRob Herring (Arm) 16*5c163c97SRob Herring (Arm) reg: 17*5c163c97SRob Herring (Arm) maxItems: 1 18*5c163c97SRob Herring (Arm) 19*5c163c97SRob Herring (Arm) gpio-controller: true 20*5c163c97SRob Herring (Arm) 21*5c163c97SRob Herring (Arm) '#gpio-cells': 22*5c163c97SRob Herring (Arm) const: 2 23*5c163c97SRob Herring (Arm) 24*5c163c97SRob Herring (Arm) interrupt-controller: true 25*5c163c97SRob Herring (Arm) 26*5c163c97SRob Herring (Arm) '#interrupt-cells': 27*5c163c97SRob Herring (Arm) const: 2 28*5c163c97SRob Herring (Arm) 29*5c163c97SRob Herring (Arm) interrupts: 30*5c163c97SRob Herring (Arm) maxItems: 16 31*5c163c97SRob Herring (Arm) 32*5c163c97SRob Herring (Arm)required: 33*5c163c97SRob Herring (Arm) - compatible 34*5c163c97SRob Herring (Arm) - reg 35*5c163c97SRob Herring (Arm) - gpio-controller 36*5c163c97SRob Herring (Arm) - '#gpio-cells' 37*5c163c97SRob Herring (Arm) - interrupt-controller 38*5c163c97SRob Herring (Arm) - '#interrupt-cells' 39*5c163c97SRob Herring (Arm) - interrupts 40*5c163c97SRob Herring (Arm) 41*5c163c97SRob Herring (Arm)additionalProperties: false 42*5c163c97SRob Herring (Arm) 43*5c163c97SRob Herring (Arm)examples: 44*5c163c97SRob Herring (Arm) - | 45*5c163c97SRob Herring (Arm) bus { 46*5c163c97SRob Herring (Arm) #address-cells = <2>; 47*5c163c97SRob Herring (Arm) #size-cells = <2>; 48*5c163c97SRob Herring (Arm) 49*5c163c97SRob Herring (Arm) gpio@1070000000800 { 50*5c163c97SRob Herring (Arm) compatible = "cavium,octeon-3860-gpio"; 51*5c163c97SRob Herring (Arm) reg = <0x10700 0x00000800 0x0 0x100>; 52*5c163c97SRob Herring (Arm) gpio-controller; 53*5c163c97SRob Herring (Arm) #gpio-cells = <2>; 54*5c163c97SRob Herring (Arm) interrupt-controller; 55*5c163c97SRob Herring (Arm) #interrupt-cells = <2>; 56*5c163c97SRob Herring (Arm) /* The GPIO pin connect to 16 consecutive CUI bits */ 57*5c163c97SRob Herring (Arm) interrupts = <0 16>, <0 17>, <0 18>, <0 19>, 58*5c163c97SRob Herring (Arm) <0 20>, <0 21>, <0 22>, <0 23>, 59*5c163c97SRob Herring (Arm) <0 24>, <0 25>, <0 26>, <0 27>, 60*5c163c97SRob Herring (Arm) <0 28>, <0 29>, <0 30>, <0 31>; 61*5c163c97SRob Herring (Arm) }; 62*5c163c97SRob Herring (Arm) }; 63