xref: /linux/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml (revision bbfd5594756011167b8f8de9a00e0c946afda1e6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Elo DMA Controller
8
9maintainers:
10  - J. Neuschäfer <j.ne@posteo.net>
11
12description:
13  This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
14  series chips such as mpc8315, mpc8349, mpc8379 etc.
15
16properties:
17  compatible:
18    items:
19      - enum:
20          - fsl,mpc8313-dma
21          - fsl,mpc8315-dma
22          - fsl,mpc8323-dma
23          - fsl,mpc8347-dma
24          - fsl,mpc8349-dma
25          - fsl,mpc8360-dma
26          - fsl,mpc8377-dma
27          - fsl,mpc8378-dma
28          - fsl,mpc8379-dma
29      - const: fsl,elo-dma
30
31  reg:
32    items:
33      - description:
34          DMA General Status Register, i.e. DGSR which contains status for
35          all the 4 DMA channels.
36
37  cell-index:
38    $ref: /schemas/types.yaml#/definitions/uint32
39    description: Controller index. 0 for controller @ 0x8100.
40
41  ranges: true
42
43  "#address-cells":
44    const: 1
45
46  "#size-cells":
47    const: 1
48
49  interrupts:
50    maxItems: 1
51    description: Controller interrupt.
52
53required:
54  - compatible
55  - reg
56
57patternProperties:
58  "^dma-channel@[0-9a-f]+$":
59    type: object
60    additionalProperties: false
61
62    properties:
63      compatible:
64        oneOf:
65          # native DMA channel
66          - items:
67              - enum:
68                  - fsl,mpc8315-dma-channel
69                  - fsl,mpc8323-dma-channel
70                  - fsl,mpc8347-dma-channel
71                  - fsl,mpc8349-dma-channel
72                  - fsl,mpc8360-dma-channel
73                  - fsl,mpc8377-dma-channel
74                  - fsl,mpc8378-dma-channel
75                  - fsl,mpc8379-dma-channel
76              - const: fsl,elo-dma-channel
77
78          # audio DMA channel, see fsl,ssi.yaml
79          - const: fsl,ssi-dma-channel
80
81      reg:
82        maxItems: 1
83
84      cell-index:
85        description: DMA channel index starts at 0.
86
87      interrupts:
88        maxItems: 1
89        description:
90          Per-channel interrupt. Only necessary if no controller interrupt has
91          been provided.
92
93additionalProperties: false
94
95examples:
96  - |
97    #include <dt-bindings/interrupt-controller/irq.h>
98
99    dma@82a8 {
100        compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
101        reg = <0x82a8 4>;
102        #address-cells = <1>;
103        #size-cells = <1>;
104        ranges = <0 0x8100 0x1a4>;
105        interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
106        cell-index = <0>;
107
108        dma-channel@0 {
109            compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
110            reg = <0 0x80>;
111            cell-index = <0>;
112            interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
113        };
114
115        dma-channel@80 {
116            compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117            reg = <0x80 0x80>;
118            cell-index = <1>;
119            interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
120        };
121
122        dma-channel@100 {
123            compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124            reg = <0x100 0x80>;
125            cell-index = <2>;
126            interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
127        };
128
129        dma-channel@180 {
130            compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
131            reg = <0x180 0x80>;
132            cell-index = <3>;
133            interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
134        };
135    };
136
137...
138