1*e0390da3SLiu Ying# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*e0390da3SLiu Ying%YAML 1.2 3*e0390da3SLiu Ying--- 4*e0390da3SLiu Ying$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml# 5*e0390da3SLiu Ying$schema: http://devicetree.org/meta-schemas/core.yaml# 6*e0390da3SLiu Ying 7*e0390da3SLiu Yingtitle: Freescale i.MX8qxp Display Controller AXI Performance Counter 8*e0390da3SLiu Ying 9*e0390da3SLiu Yingdescription: | 10*e0390da3SLiu Ying Performance counters are provided to allow measurement of average bandwidth 11*e0390da3SLiu Ying and latency during operation. The following features are supported: 12*e0390da3SLiu Ying 13*e0390da3SLiu Ying * Manual and timer controlled measurement mode. 14*e0390da3SLiu Ying 15*e0390da3SLiu Ying * Measurement counters: 16*e0390da3SLiu Ying - GLOBAL_COUNTER for overall measurement time 17*e0390da3SLiu Ying - BUSY_COUNTER for number of data bus busy cycles 18*e0390da3SLiu Ying - DATA_COUNTER for number of data transfer cycles 19*e0390da3SLiu Ying - TRANSFER_COUNTER for number of transfers 20*e0390da3SLiu Ying - ADDRBUSY_COUNTER for number of address bus busy cycles 21*e0390da3SLiu Ying - LATENCY_COUNTER for average latency 22*e0390da3SLiu Ying 23*e0390da3SLiu Ying * Counter overflow detection. 24*e0390da3SLiu Ying 25*e0390da3SLiu Ying * Outstanding Transfer Counters (OTC) which are used for latency measurement 26*e0390da3SLiu Ying have to run immediately after reset, but can be disabled by software when 27*e0390da3SLiu Ying there is no need for latency measurement. 28*e0390da3SLiu Ying 29*e0390da3SLiu Yingmaintainers: 30*e0390da3SLiu Ying - Liu Ying <victor.liu@nxp.com> 31*e0390da3SLiu Ying 32*e0390da3SLiu Yingproperties: 33*e0390da3SLiu Ying compatible: 34*e0390da3SLiu Ying const: fsl,imx8qxp-dc-axi-performance-counter 35*e0390da3SLiu Ying 36*e0390da3SLiu Ying reg: 37*e0390da3SLiu Ying maxItems: 1 38*e0390da3SLiu Ying 39*e0390da3SLiu Ying clocks: 40*e0390da3SLiu Ying maxItems: 1 41*e0390da3SLiu Ying 42*e0390da3SLiu Yingrequired: 43*e0390da3SLiu Ying - compatible 44*e0390da3SLiu Ying - reg 45*e0390da3SLiu Ying - clocks 46*e0390da3SLiu Ying 47*e0390da3SLiu YingadditionalProperties: false 48*e0390da3SLiu Ying 49*e0390da3SLiu Yingexamples: 50*e0390da3SLiu Ying - | 51*e0390da3SLiu Ying #include <dt-bindings/clock/imx8-lpcg.h> 52*e0390da3SLiu Ying 53*e0390da3SLiu Ying pmu@5618f000 { 54*e0390da3SLiu Ying compatible = "fsl,imx8qxp-dc-axi-performance-counter"; 55*e0390da3SLiu Ying reg = <0x5618f000 0x90>; 56*e0390da3SLiu Ying clocks = <&dc0_lpcg IMX_LPCG_CLK_5>; 57*e0390da3SLiu Ying }; 58