xref: /linux/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX8qxp Display Controller AXI Performance Counter
8
9description: |
10  Performance counters are provided to allow measurement of average bandwidth
11  and latency during operation. The following features are supported:
12
13  * Manual and timer controlled measurement mode.
14
15  * Measurement counters:
16    - GLOBAL_COUNTER for overall measurement time
17    - BUSY_COUNTER for number of data bus busy cycles
18    - DATA_COUNTER for number of data transfer cycles
19    - TRANSFER_COUNTER for number of transfers
20    - ADDRBUSY_COUNTER for number of address bus busy cycles
21    - LATENCY_COUNTER for average latency
22
23  * Counter overflow detection.
24
25  * Outstanding Transfer Counters (OTC) which are used for latency measurement
26    have to run immediately after reset, but can be disabled by software when
27    there is no need for latency measurement.
28
29maintainers:
30  - Liu Ying <victor.liu@nxp.com>
31
32properties:
33  compatible:
34    const: fsl,imx8qxp-dc-axi-performance-counter
35
36  reg:
37    maxItems: 1
38
39  clocks:
40    maxItems: 1
41
42required:
43  - compatible
44  - reg
45  - clocks
46
47additionalProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/clock/imx8-lpcg.h>
52
53    pmu@5618f000 {
54        compatible = "fsl,imx8qxp-dc-axi-performance-counter";
55        reg = <0x5618f000 0x90>;
56        clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;
57    };
58