xref: /linux/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-framegen.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-framegen.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX8qxp Display Controller Frame Generator
8
9description:
10  The Frame Generator (FrameGen) module generates a programmable video timing
11  and optionally allows to synchronize the generated video timing to external
12  synchronization signals.
13
14maintainers:
15  - Liu Ying <victor.liu@nxp.com>
16
17properties:
18  compatible:
19    const: fsl,imx8qxp-dc-framegen
20
21  reg:
22    maxItems: 1
23
24  clocks:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 8
29
30  interrupt-names:
31    items:
32      - const: int0
33      - const: int1
34      - const: int2
35      - const: int3
36      - const: primsync_on
37      - const: primsync_off
38      - const: secsync_on
39      - const: secsync_off
40
41required:
42  - compatible
43  - reg
44  - clocks
45  - interrupts
46  - interrupt-names
47
48additionalProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/imx8-lpcg.h>
53    #include <dt-bindings/firmware/imx/rsrc.h>
54
55    framegen@5618b800 {
56        compatible = "fsl,imx8qxp-dc-framegen";
57        reg = <0x5618b800 0x98>;
58        clocks = <&dc0_disp_lpcg IMX_LPCG_CLK_0>;
59        interrupt-parent = <&dc0_intc>;
60        interrupts = <18>, <19>, <20>, <21>, <41>, <42>, <43>, <44>;
61        interrupt-names = "int0", "int1", "int2", "int3",
62                          "primsync_on", "primsync_off",
63                          "secsync_on", "secsync_off";
64    };
65