1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/ti,clkctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Texas Instruments clkctrl clock 8 9maintainers: 10 - Tony Lindgren <tony@atomide.com> 11 - Andreas Kemnade <andreas@kemnade.info> 12 13description: | 14 Texas Instruments SoCs can have a clkctrl clock controller for each 15 interconnect target module. The clkctrl clock controller manages functional 16 and interface clocks for each module. Each clkctrl controller can also 17 gate one or more optional functional clocks for a module, and can have one 18 or more clock muxes. There is a clkctrl clock controller typically for each 19 interconnect target module on omap4 and later variants. 20 21 The clock consumers can specify the index of the clkctrl clock using 22 the hardware offset from the clkctrl instance register space. The optional 23 clocks can be specified by clkctrl hardware offset and the index of the 24 optional clock. 25 26properties: 27 compatible: 28 enum: 29 - ti,clkctrl 30 - ti,clkctrl-l4-cfg 31 - ti,clkctrl-l4-per 32 - ti,clkctrl-l4-secure 33 - ti,clkctrl-l4-wkup 34 35 "#clock-cells": 36 const: 2 37 38 clock-output-names: 39 maxItems: 1 40 41 reg: 42 minItems: 1 43 maxItems: 8 # arbitrary, should be enough 44 45required: 46 - compatible 47 - "#clock-cells" 48 - clock-output-names 49 - reg 50 51additionalProperties: false 52 53examples: 54 - | 55 bus { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 59 clock@20 { 60 compatible = "ti,clkctrl"; 61 clock-output-names = "l4_per"; 62 reg = <0x20 0x1b0>; 63 #clock-cells = <2>; 64 }; 65 }; 66