15feae3e7SIgor Belwon# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 25feae3e7SIgor Belwon%YAML 1.2 35feae3e7SIgor Belwon--- 45feae3e7SIgor Belwon$id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml# 55feae3e7SIgor Belwon$schema: http://devicetree.org/meta-schemas/core.yaml# 65feae3e7SIgor Belwon 75feae3e7SIgor Belwontitle: Samsung Exynos990 SoC clock controller 85feae3e7SIgor Belwon 95feae3e7SIgor Belwonmaintainers: 105feae3e7SIgor Belwon - Igor Belwon <igor.belwon@mentallysanemainliners.org> 115feae3e7SIgor Belwon - Chanwoo Choi <cw00.choi@samsung.com> 125feae3e7SIgor Belwon - Krzysztof Kozlowski <krzk@kernel.org> 135feae3e7SIgor Belwon 145feae3e7SIgor Belwondescription: | 155feae3e7SIgor Belwon Exynos990 clock controller is comprised of several CMU units, generating 165feae3e7SIgor Belwon clocks for different domains. Those CMU units are modeled as separate device 175feae3e7SIgor Belwon tree nodes, and might depend on each other. The root clock in that root tree 185feae3e7SIgor Belwon is an external clock: OSCCLK (26 MHz). This external clock must be defined 195feae3e7SIgor Belwon as a fixed-rate clock in dts. 205feae3e7SIgor Belwon 215feae3e7SIgor Belwon CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and 225feae3e7SIgor Belwon dividers; all other clocks of function blocks (other CMUs) are usually 235feae3e7SIgor Belwon derived from CMU_TOP. 245feae3e7SIgor Belwon 255feae3e7SIgor Belwon Each clock is assigned an identifier and client nodes can use this identifier 265feae3e7SIgor Belwon to specify the clock which they consume. All clocks available for usage 275feae3e7SIgor Belwon in clock consumer nodes are defined as preprocessor macros in 285feae3e7SIgor Belwon 'include/dt-bindings/clock/samsung,exynos990.h' header. 295feae3e7SIgor Belwon 305feae3e7SIgor Belwonproperties: 315feae3e7SIgor Belwon compatible: 325feae3e7SIgor Belwon enum: 335feae3e7SIgor Belwon - samsung,exynos990-cmu-hsi0 34*7fa119f5SIgor Belwon - samsung,exynos990-cmu-peris 355feae3e7SIgor Belwon - samsung,exynos990-cmu-top 365feae3e7SIgor Belwon 375feae3e7SIgor Belwon clocks: 385feae3e7SIgor Belwon minItems: 1 395feae3e7SIgor Belwon maxItems: 5 405feae3e7SIgor Belwon 415feae3e7SIgor Belwon clock-names: 425feae3e7SIgor Belwon minItems: 1 435feae3e7SIgor Belwon maxItems: 5 445feae3e7SIgor Belwon 455feae3e7SIgor Belwon "#clock-cells": 465feae3e7SIgor Belwon const: 1 475feae3e7SIgor Belwon 485feae3e7SIgor Belwon reg: 495feae3e7SIgor Belwon maxItems: 1 505feae3e7SIgor Belwon 515feae3e7SIgor Belwonrequired: 525feae3e7SIgor Belwon - compatible 535feae3e7SIgor Belwon - clocks 545feae3e7SIgor Belwon - clock-names 555feae3e7SIgor Belwon - "#clock-cells" 565feae3e7SIgor Belwon - reg 575feae3e7SIgor Belwon 585feae3e7SIgor BelwonallOf: 595feae3e7SIgor Belwon - if: 605feae3e7SIgor Belwon properties: 615feae3e7SIgor Belwon compatible: 625feae3e7SIgor Belwon contains: 635feae3e7SIgor Belwon const: samsung,exynos990-cmu-hsi0 645feae3e7SIgor Belwon 655feae3e7SIgor Belwon then: 665feae3e7SIgor Belwon properties: 675feae3e7SIgor Belwon clocks: 685feae3e7SIgor Belwon items: 695feae3e7SIgor Belwon - description: External reference clock (26 MHz) 705feae3e7SIgor Belwon - description: CMU_HSI0 BUS clock (from CMU_TOP) 715feae3e7SIgor Belwon - description: CMU_HSI0 USB31DRD clock (from CMU_TOP) 725feae3e7SIgor Belwon - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP) 735feae3e7SIgor Belwon - description: CMU_HSI0 DPGTC clock (from CMU_TOP) 745feae3e7SIgor Belwon 755feae3e7SIgor Belwon clock-names: 765feae3e7SIgor Belwon items: 775feae3e7SIgor Belwon - const: oscclk 785feae3e7SIgor Belwon - const: bus 795feae3e7SIgor Belwon - const: usb31drd 805feae3e7SIgor Belwon - const: usbdp_debug 815feae3e7SIgor Belwon - const: dpgtc 825feae3e7SIgor Belwon 835feae3e7SIgor Belwon - if: 845feae3e7SIgor Belwon properties: 855feae3e7SIgor Belwon compatible: 865feae3e7SIgor Belwon contains: 87*7fa119f5SIgor Belwon const: samsung,exynos990-cmu-peris 88*7fa119f5SIgor Belwon 89*7fa119f5SIgor Belwon then: 90*7fa119f5SIgor Belwon properties: 91*7fa119f5SIgor Belwon clocks: 92*7fa119f5SIgor Belwon items: 93*7fa119f5SIgor Belwon - description: External reference clock (26 MHz) 94*7fa119f5SIgor Belwon - description: CMU_PERIS BUS clock (from CMU_TOP) 95*7fa119f5SIgor Belwon 96*7fa119f5SIgor Belwon clock-names: 97*7fa119f5SIgor Belwon items: 98*7fa119f5SIgor Belwon - const: oscclk 99*7fa119f5SIgor Belwon - const: bus 100*7fa119f5SIgor Belwon 101*7fa119f5SIgor Belwon - if: 102*7fa119f5SIgor Belwon properties: 103*7fa119f5SIgor Belwon compatible: 104*7fa119f5SIgor Belwon contains: 1055feae3e7SIgor Belwon const: samsung,exynos990-cmu-top 1065feae3e7SIgor Belwon 1075feae3e7SIgor Belwon then: 1085feae3e7SIgor Belwon properties: 1095feae3e7SIgor Belwon clocks: 1105feae3e7SIgor Belwon items: 1115feae3e7SIgor Belwon - description: External reference clock (26 MHz) 1125feae3e7SIgor Belwon 1135feae3e7SIgor Belwon clock-names: 1145feae3e7SIgor Belwon items: 1155feae3e7SIgor Belwon - const: oscclk 1165feae3e7SIgor Belwon 1175feae3e7SIgor BelwonadditionalProperties: false 1185feae3e7SIgor Belwon 1195feae3e7SIgor Belwonexamples: 1205feae3e7SIgor Belwon - | 1215feae3e7SIgor Belwon #include <dt-bindings/clock/samsung,exynos990.h> 1225feae3e7SIgor Belwon 1235feae3e7SIgor Belwon cmu_hsi0: clock-controller@10a00000 { 1245feae3e7SIgor Belwon compatible = "samsung,exynos990-cmu-hsi0"; 1255feae3e7SIgor Belwon reg = <0x10a00000 0x8000>; 1265feae3e7SIgor Belwon #clock-cells = <1>; 1275feae3e7SIgor Belwon 1285feae3e7SIgor Belwon clocks = <&oscclk>, 1295feae3e7SIgor Belwon <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, 1305feae3e7SIgor Belwon <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, 1315feae3e7SIgor Belwon <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>, 1325feae3e7SIgor Belwon <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>; 1335feae3e7SIgor Belwon clock-names = "oscclk", 1345feae3e7SIgor Belwon "bus", 1355feae3e7SIgor Belwon "usb31drd", 1365feae3e7SIgor Belwon "usbdp_debug", 1375feae3e7SIgor Belwon "dpgtc"; 1385feae3e7SIgor Belwon }; 1395feae3e7SIgor Belwon 1405feae3e7SIgor Belwon... 141