xref: /linux/Documentation/devicetree/bindings/clock/rockchip,rv1106-cru.yaml (revision 502d45774af09f1c681c754c4b7cdfb5d7f72fd9)
1*713e4d54SSimon Glass# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*713e4d54SSimon Glass%YAML 1.2
3*713e4d54SSimon Glass---
4*713e4d54SSimon Glass$id: http://devicetree.org/schemas/clock/rockchip,rv1106-cru.yaml#
5*713e4d54SSimon Glass$schema: http://devicetree.org/meta-schemas/core.yaml#
6*713e4d54SSimon Glass
7*713e4d54SSimon Glasstitle: Rockchip RV1106 Clock and Reset Unit
8*713e4d54SSimon Glass
9*713e4d54SSimon Glassmaintainers:
10*713e4d54SSimon Glass  - Simon Glass <sjg@chromium.org>
11*713e4d54SSimon Glass  - Heiko Stuebner <heiko@sntech.de>
12*713e4d54SSimon Glass
13*713e4d54SSimon Glassdescription:
14*713e4d54SSimon Glass  The RV1106 clock controller generates the clock and also implements a
15*713e4d54SSimon Glass  reset controller for SoC peripherals.
16*713e4d54SSimon Glass
17*713e4d54SSimon Glassproperties:
18*713e4d54SSimon Glass  compatible:
19*713e4d54SSimon Glass    const: rockchip,rv1106-cru
20*713e4d54SSimon Glass
21*713e4d54SSimon Glass  reg:
22*713e4d54SSimon Glass    maxItems: 1
23*713e4d54SSimon Glass
24*713e4d54SSimon Glass  "#clock-cells":
25*713e4d54SSimon Glass    const: 1
26*713e4d54SSimon Glass
27*713e4d54SSimon Glass  "#reset-cells":
28*713e4d54SSimon Glass    const: 1
29*713e4d54SSimon Glass
30*713e4d54SSimon Glass  clocks:
31*713e4d54SSimon Glass    maxItems: 1
32*713e4d54SSimon Glass
33*713e4d54SSimon Glass  clock-names:
34*713e4d54SSimon Glass    const: xin24m
35*713e4d54SSimon Glass
36*713e4d54SSimon Glass  rockchip,grf:
37*713e4d54SSimon Glass    $ref: /schemas/types.yaml#/definitions/phandle
38*713e4d54SSimon Glass    description:
39*713e4d54SSimon Glass      Phandle to the syscon managing the "general register files" (GRF).
40*713e4d54SSimon Glass      If missing, pll rates are not changeable due to the missing pll
41*713e4d54SSimon Glass      lock status, and the MMC drive and sample phase clocks, whose
42*713e4d54SSimon Glass      control registers live in the GRF region, are not registered.
43*713e4d54SSimon Glass
44*713e4d54SSimon Glassrequired:
45*713e4d54SSimon Glass  - compatible
46*713e4d54SSimon Glass  - reg
47*713e4d54SSimon Glass  - "#clock-cells"
48*713e4d54SSimon Glass  - "#reset-cells"
49*713e4d54SSimon Glass
50*713e4d54SSimon GlassadditionalProperties: false
51*713e4d54SSimon Glass
52*713e4d54SSimon Glassexamples:
53*713e4d54SSimon Glass  - |
54*713e4d54SSimon Glass    clock-controller@ff3b0000 {
55*713e4d54SSimon Glass      compatible = "rockchip,rv1106-cru";
56*713e4d54SSimon Glass      reg = <0xff3b0000 0x20000>;
57*713e4d54SSimon Glass      rockchip,grf = <&grf>;
58*713e4d54SSimon Glass      #clock-cells = <1>;
59*713e4d54SSimon Glass      #reset-cells = <1>;
60*713e4d54SSimon Glass    };
61