xref: /linux/Documentation/devicetree/bindings/clock/qcom,sa8775p-camcc.yaml (revision beaea9c4ba2d8ef1b10223dc3a75a7d7be3e5cd9) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sa8775p-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SA8775P
8
9maintainers:
10  - Taniya Das <quic_tdas@quicinc.com>
11  - Imran Shaik <quic_imrashai@quicinc.com>
12
13description: |
14  Qualcomm camera clock control module provides the clocks, resets and power
15  domains on SA8775p.
16
17  See also:
18    include/dt-bindings/clock/qcom,qcs8300-camcc.h
19    include/dt-bindings/clock/qcom,sa8775p-camcc.h
20    include/dt-bindings/clock/qcom,sc8280xp-camcc.h
21
22properties:
23  compatible:
24    enum:
25      - qcom,qcs8300-camcc
26      - qcom,sa8775p-camcc
27      - qcom,sc8280xp-camcc
28
29  clocks:
30    items:
31      - description: Camera AHB clock from GCC
32      - description: Board XO source
33      - description: Board active XO source
34      - description: Sleep clock source
35
36  power-domains:
37    maxItems: 1
38    description: MMCX power domain
39
40  required-opps:
41    description:
42      OPP node describing required MMCX performance point.
43    maxItems: 1
44
45required:
46  - compatible
47  - clocks
48  - power-domains
49  - '#power-domain-cells'
50
51allOf:
52  - $ref: qcom,gcc.yaml#
53  - if:
54      properties:
55        compatible:
56          contains:
57            const: qcom,sc8280xp-camcc
58    then:
59      required:
60        - required-opps
61
62unevaluatedProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/clock/qcom,rpmh.h>
67    #include <dt-bindings/power/qcom-rpmpd.h>
68    #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
69    clock-controller@ade0000 {
70      compatible = "qcom,sa8775p-camcc";
71      reg = <0x0ade0000 0x20000>;
72      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
73               <&rpmhcc RPMH_CXO_CLK>,
74               <&rpmhcc RPMH_CXO_CLK_A>,
75               <&sleep_clk>;
76      power-domains = <&rpmhpd SA8775P_MMCX>;
77      #clock-cells = <1>;
78      #reset-cells = <1>;
79      #power-domain-cells = <1>;
80    };
81...
82