xref: /linux/Documentation/devicetree/bindings/clock/qcom,sa8775p-camcc.yaml (revision 21a5352dc702d8e6dc874e0eb6ba6d81291a788a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sa8775p-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SA8775P
8
9maintainers:
10  - Taniya Das <quic_tdas@quicinc.com>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and power
14  domains on SA8775p.
15
16  See also: include/dt-bindings/clock/qcom,sa8775p-camcc.h
17
18properties:
19  compatible:
20    enum:
21      - qcom,sa8775p-camcc
22
23  clocks:
24    items:
25      - description: Camera AHB clock from GCC
26      - description: Board XO source
27      - description: Board active XO source
28      - description: Sleep clock source
29
30  power-domains:
31    maxItems: 1
32    description: MMCX power domain
33
34required:
35  - compatible
36  - clocks
37  - power-domains
38  - '#power-domain-cells'
39
40allOf:
41  - $ref: qcom,gcc.yaml#
42
43unevaluatedProperties: false
44
45examples:
46  - |
47    #include <dt-bindings/clock/qcom,rpmh.h>
48    #include <dt-bindings/power/qcom-rpmpd.h>
49    #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
50    clock-controller@ade0000 {
51      compatible = "qcom,sa8775p-camcc";
52      reg = <0x0ade0000 0x20000>;
53      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
54               <&rpmhcc RPMH_CXO_CLK>,
55               <&rpmhcc RPMH_CXO_CLK_A>,
56               <&sleep_clk>;
57      power-domains = <&rpmhpd SA8775P_MMCX>;
58      #clock-cells = <1>;
59      #reset-cells = <1>;
60      #power-domain-cells = <1>;
61    };
62...
63