xref: /linux/Documentation/devicetree/bindings/clock/qcom,ipq9574-nsscc.yaml (revision 75bfe7a0381e7fafd268e184b60b17574417a316)
1*28300eceSDevi Priya# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*28300eceSDevi Priya%YAML 1.2
3*28300eceSDevi Priya---
4*28300eceSDevi Priya$id: http://devicetree.org/schemas/clock/qcom,ipq9574-nsscc.yaml#
5*28300eceSDevi Priya$schema: http://devicetree.org/meta-schemas/core.yaml#
6*28300eceSDevi Priya
7*28300eceSDevi Priyatitle: Qualcomm Networking Sub System Clock & Reset Controller on IPQ9574
8*28300eceSDevi Priya
9*28300eceSDevi Priyamaintainers:
10*28300eceSDevi Priya  - Bjorn Andersson <andersson@kernel.org>
11*28300eceSDevi Priya  - Anusha Rao <quic_anusha@quicinc.com>
12*28300eceSDevi Priya
13*28300eceSDevi Priyadescription: |
14*28300eceSDevi Priya  Qualcomm networking sub system clock control module provides the clocks,
15*28300eceSDevi Priya  resets on IPQ9574
16*28300eceSDevi Priya
17*28300eceSDevi Priya  See also::
18*28300eceSDevi Priya    include/dt-bindings/clock/qcom,ipq9574-nsscc.h
19*28300eceSDevi Priya    include/dt-bindings/reset/qcom,ipq9574-nsscc.h
20*28300eceSDevi Priya
21*28300eceSDevi Priyaproperties:
22*28300eceSDevi Priya  compatible:
23*28300eceSDevi Priya    const: qcom,ipq9574-nsscc
24*28300eceSDevi Priya
25*28300eceSDevi Priya  clocks:
26*28300eceSDevi Priya    items:
27*28300eceSDevi Priya      - description: Board XO source
28*28300eceSDevi Priya      - description: CMN_PLL NSS 1200MHz (Bias PLL cc) clock source
29*28300eceSDevi Priya      - description: CMN_PLL PPE 353MHz (Bias PLL ubi nc) clock source
30*28300eceSDevi Priya      - description: GCC GPLL0 OUT AUX clock source
31*28300eceSDevi Priya      - description: Uniphy0 NSS Rx clock source
32*28300eceSDevi Priya      - description: Uniphy0 NSS Tx clock source
33*28300eceSDevi Priya      - description: Uniphy1 NSS Rx clock source
34*28300eceSDevi Priya      - description: Uniphy1 NSS Tx clock source
35*28300eceSDevi Priya      - description: Uniphy2 NSS Rx clock source
36*28300eceSDevi Priya      - description: Uniphy2 NSS Tx clock source
37*28300eceSDevi Priya      - description: GCC NSSCC clock source
38*28300eceSDevi Priya
39*28300eceSDevi Priya  '#interconnect-cells':
40*28300eceSDevi Priya    const: 1
41*28300eceSDevi Priya
42*28300eceSDevi Priya  clock-names:
43*28300eceSDevi Priya    items:
44*28300eceSDevi Priya      - const: xo
45*28300eceSDevi Priya      - const: nss_1200
46*28300eceSDevi Priya      - const: ppe_353
47*28300eceSDevi Priya      - const: gpll0_out
48*28300eceSDevi Priya      - const: uniphy0_rx
49*28300eceSDevi Priya      - const: uniphy0_tx
50*28300eceSDevi Priya      - const: uniphy1_rx
51*28300eceSDevi Priya      - const: uniphy1_tx
52*28300eceSDevi Priya      - const: uniphy2_rx
53*28300eceSDevi Priya      - const: uniphy2_tx
54*28300eceSDevi Priya      - const: bus
55*28300eceSDevi Priya
56*28300eceSDevi Priyarequired:
57*28300eceSDevi Priya  - compatible
58*28300eceSDevi Priya  - clocks
59*28300eceSDevi Priya  - clock-names
60*28300eceSDevi Priya
61*28300eceSDevi PriyaallOf:
62*28300eceSDevi Priya  - $ref: qcom,gcc.yaml#
63*28300eceSDevi Priya
64*28300eceSDevi PriyaunevaluatedProperties: false
65*28300eceSDevi Priya
66*28300eceSDevi Priyaexamples:
67*28300eceSDevi Priya  - |
68*28300eceSDevi Priya    #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
69*28300eceSDevi Priya    #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
70*28300eceSDevi Priya    clock-controller@39b00000 {
71*28300eceSDevi Priya      compatible = "qcom,ipq9574-nsscc";
72*28300eceSDevi Priya      reg = <0x39b00000 0x80000>;
73*28300eceSDevi Priya      clocks = <&xo_board_clk>,
74*28300eceSDevi Priya               <&cmn_pll NSS_1200MHZ_CLK>,
75*28300eceSDevi Priya               <&cmn_pll PPE_353MHZ_CLK>,
76*28300eceSDevi Priya               <&gcc GPLL0_OUT_AUX>,
77*28300eceSDevi Priya               <&uniphy 0>,
78*28300eceSDevi Priya               <&uniphy 1>,
79*28300eceSDevi Priya               <&uniphy 2>,
80*28300eceSDevi Priya               <&uniphy 3>,
81*28300eceSDevi Priya               <&uniphy 4>,
82*28300eceSDevi Priya               <&uniphy 5>,
83*28300eceSDevi Priya               <&gcc GCC_NSSCC_CLK>;
84*28300eceSDevi Priya      clock-names = "xo",
85*28300eceSDevi Priya                    "nss_1200",
86*28300eceSDevi Priya                    "ppe_353",
87*28300eceSDevi Priya                    "gpll0_out",
88*28300eceSDevi Priya                    "uniphy0_rx",
89*28300eceSDevi Priya                    "uniphy0_tx",
90*28300eceSDevi Priya                    "uniphy1_rx",
91*28300eceSDevi Priya                    "uniphy1_tx",
92*28300eceSDevi Priya                    "uniphy2_rx",
93*28300eceSDevi Priya                    "uniphy2_tx",
94*28300eceSDevi Priya                    "bus";
95*28300eceSDevi Priya      #clock-cells = <1>;
96*28300eceSDevi Priya      #reset-cells = <1>;
97*28300eceSDevi Priya    };
98*28300eceSDevi Priya...
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