xref: /linux/Documentation/devicetree/bindings/clock/qcom,milos-videocc.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,milos-videocc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Video Clock & Reset Controller on Milos
8
9maintainers:
10  - Luca Weiss <luca.weiss@fairphone.com>
11
12description: |
13  Qualcomm video clock control module provides the clocks, resets and power
14  domains on Milos.
15
16  See also: include/dt-bindings/clock/qcom,milos-videocc.h
17
18properties:
19  compatible:
20    const: qcom,milos-videocc
21
22  clocks:
23    items:
24      - description: Board XO source
25      - description: Board active XO source
26      - description: Sleep clock source
27      - description: Video AHB clock from GCC
28
29required:
30  - compatible
31  - clocks
32
33allOf:
34  - $ref: qcom,gcc.yaml#
35
36unevaluatedProperties: false
37
38examples:
39  - |
40    #include <dt-bindings/clock/qcom,milos-gcc.h>
41    clock-controller@aaf0000 {
42        compatible = "qcom,milos-videocc";
43        reg = <0x0aaf0000 0x10000>;
44        clocks = <&bi_tcxo_div2>,
45                 <&bi_tcxo_ao_div2>,
46                 <&sleep_clk>,
47                 <&gcc GCC_VIDEO_AHB_CLK>;
48        #clock-cells = <1>;
49        #reset-cells = <1>;
50        #power-domain-cells = <1>;
51    };
52
53...
54