1d6cd9d56SVivek Aknurwar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2d6cd9d56SVivek Aknurwar%YAML 1.2 3d6cd9d56SVivek Aknurwar--- 4d6cd9d56SVivek Aknurwar$id: http://devicetree.org/schemas/clock/qcom,hawi-gcc.yaml# 5d6cd9d56SVivek Aknurwar$schema: http://devicetree.org/meta-schemas/core.yaml# 6d6cd9d56SVivek Aknurwar 7d6cd9d56SVivek Aknurwartitle: Qualcomm Global Clock & Reset Controller on Hawi 8d6cd9d56SVivek Aknurwar 9d6cd9d56SVivek Aknurwarmaintainers: 10d6cd9d56SVivek Aknurwar - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com> 11*86ea9de5STaniya Das - Taniya Das <taniya.das@oss.qualcomm.com> 12d6cd9d56SVivek Aknurwar 13d6cd9d56SVivek Aknurwardescription: | 14d6cd9d56SVivek Aknurwar Qualcomm global clock control module provides the clocks, resets and power 15*86ea9de5STaniya Das domains on Hawi and Maili. 16d6cd9d56SVivek Aknurwar 17*86ea9de5STaniya Das See also: 18*86ea9de5STaniya Das include/dt-bindings/clock/qcom,hawi-gcc.h 19*86ea9de5STaniya Das include/dt-bindings/clock/qcom,maili-gcc.h 20d6cd9d56SVivek Aknurwar 21d6cd9d56SVivek Aknurwarproperties: 22d6cd9d56SVivek Aknurwar compatible: 23*86ea9de5STaniya Das enum: 24*86ea9de5STaniya Das - qcom,hawi-gcc 25*86ea9de5STaniya Das - qcom,maili-gcc 26d6cd9d56SVivek Aknurwar 27d6cd9d56SVivek Aknurwar clocks: 28d6cd9d56SVivek Aknurwar items: 29d6cd9d56SVivek Aknurwar - description: Board XO source 30d6cd9d56SVivek Aknurwar - description: Board Always On XO source 31d6cd9d56SVivek Aknurwar - description: Sleep clock source 32d6cd9d56SVivek Aknurwar - description: PCIE 0 Pipe clock source 33d6cd9d56SVivek Aknurwar - description: PCIE 1 Pipe clock source 34d6cd9d56SVivek Aknurwar - description: UFS PHY RX symbol 0 clock 35d6cd9d56SVivek Aknurwar - description: UFS PHY RX symbol 1 clock 36d6cd9d56SVivek Aknurwar - description: UFS PHY TX symbol 0 clock 37d6cd9d56SVivek Aknurwar - description: USB3 PHY wrapper pipe clock 38d6cd9d56SVivek Aknurwar 39d6cd9d56SVivek Aknurwarrequired: 40d6cd9d56SVivek Aknurwar - compatible 41d6cd9d56SVivek Aknurwar - clocks 42d6cd9d56SVivek Aknurwar - '#power-domain-cells' 43d6cd9d56SVivek Aknurwar 44d6cd9d56SVivek AknurwarallOf: 45d6cd9d56SVivek Aknurwar - $ref: qcom,gcc.yaml# 46d6cd9d56SVivek Aknurwar 47d6cd9d56SVivek AknurwarunevaluatedProperties: false 48d6cd9d56SVivek Aknurwar 49d6cd9d56SVivek Aknurwarexamples: 50d6cd9d56SVivek Aknurwar - | 51d6cd9d56SVivek Aknurwar #include <dt-bindings/clock/qcom,rpmh.h> 52d6cd9d56SVivek Aknurwar clock-controller@100000 { 53d6cd9d56SVivek Aknurwar compatible = "qcom,hawi-gcc"; 54d6cd9d56SVivek Aknurwar reg = <0x00100000 0x1f4200>; 55d6cd9d56SVivek Aknurwar clocks = <&rpmhcc RPMH_CXO_CLK>, 56d6cd9d56SVivek Aknurwar <&rpmhcc RPMH_CXO_CLK_A>, 57d6cd9d56SVivek Aknurwar <&sleep_clk>, 58d6cd9d56SVivek Aknurwar <&pcie0_phy>, 59d6cd9d56SVivek Aknurwar <&pcie1_phy>, 60d6cd9d56SVivek Aknurwar <&ufs_mem_phy 0>, 61d6cd9d56SVivek Aknurwar <&ufs_mem_phy 1>, 62d6cd9d56SVivek Aknurwar <&ufs_mem_phy 2>, 63d6cd9d56SVivek Aknurwar <&usb_1_qmpphy>; 64d6cd9d56SVivek Aknurwar #clock-cells = <1>; 65d6cd9d56SVivek Aknurwar #reset-cells = <1>; 66d6cd9d56SVivek Aknurwar #power-domain-cells = <1>; 67d6cd9d56SVivek Aknurwar }; 68d6cd9d56SVivek Aknurwar... 69