1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,glymur-evacc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm EVA Clock & Reset Controller on Glymur SoC 8 9maintainers: 10 - Taniya Das <taniya.das@oss.qualcomm.com> 11 12description: | 13 Qualcomm EVA clock control module which supports the clocks, resets and 14 power domains for the EVA instances on Glymur SoC. 15 16 See also: 17 - include/dt-bindings/clock/qcom,glymur-evacc.h 18 19properties: 20 compatible: 21 const: qcom,glymur-evacc 22 23 clocks: 24 items: 25 - description: Interface clock from GCC 26 - description: Board XO source 27 - description: Sleep clock source 28 29 power-domains: 30 items: 31 - description: MMCX power domain 32 - description: MXC power domain 33 34 required-opps: 35 description: 36 Required OPP nodes for the MMCX and MXC power domains. 37 items: 38 - description: MMCX performance point 39 - description: MXC performance point 40 41required: 42 - compatible 43 - clocks 44 - power-domains 45 - required-opps 46 - '#power-domain-cells' 47 48allOf: 49 - $ref: qcom,gcc.yaml# 50 51unevaluatedProperties: false 52 53examples: 54 - | 55 #include <dt-bindings/clock/qcom,glymur-gcc.h> 56 #include <dt-bindings/clock/qcom,rpmh.h> 57 #include <dt-bindings/power/qcom,rpmhpd.h> 58 clock-controller@ab00000 { 59 compatible = "qcom,glymur-evacc"; 60 reg = <0x0ab00000 0x10000>; 61 clocks = <&gcc GCC_EVA_AHB_CLK>, 62 <&rpmhcc RPMH_CXO_CLK>, 63 <&sleep_clk>; 64 power-domains = <&rpmhpd RPMHPD_MMCX>, 65 <&rpmhpd RPMHPD_MXC>; 66 required-opps = <&rpmhpd_opp_low_svs>, 67 <&rpmhpd_opp_low_svs>; 68 #clock-cells = <1>; 69 #reset-cells = <1>; 70 #power-domain-cells = <1>; 71 }; 72... 73