1*4c559366SFrank Li# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4c559366SFrank Li%YAML 1.2 3*4c559366SFrank Li--- 4*4c559366SFrank Li$id: http://devicetree.org/schemas/clock/nxp,lpc1850-ccu.yaml# 5*4c559366SFrank Li$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4c559366SFrank Li 7*4c559366SFrank Lititle: NXP LPC1850 Clock Control Unit (CCU) 8*4c559366SFrank Li 9*4c559366SFrank Lidescription: 10*4c559366SFrank Li Each CGU base clock has several clock branches which can be turned on 11*4c559366SFrank Li or off independently by the Clock Control Units CCU1 or CCU2. The 12*4c559366SFrank Li branch clocks are distributed between CCU1 and CCU2. 13*4c559366SFrank Li 14*4c559366SFrank Li Above text taken from NXP LPC1850 User Manual 15*4c559366SFrank Li 16*4c559366SFrank Limaintainers: 17*4c559366SFrank Li - Frank Li <Frank.Li@nxp.com> 18*4c559366SFrank Li 19*4c559366SFrank Liproperties: 20*4c559366SFrank Li compatible: 21*4c559366SFrank Li const: nxp,lpc1850-ccu 22*4c559366SFrank Li 23*4c559366SFrank Li reg: 24*4c559366SFrank Li maxItems: 1 25*4c559366SFrank Li 26*4c559366SFrank Li '#clock-cells': 27*4c559366SFrank Li const: 1 28*4c559366SFrank Li 29*4c559366SFrank Li clocks: 30*4c559366SFrank Li minItems: 1 31*4c559366SFrank Li maxItems: 8 32*4c559366SFrank Li 33*4c559366SFrank Li clock-names: 34*4c559366SFrank Li minItems: 1 35*4c559366SFrank Li maxItems: 8 36*4c559366SFrank Li items: 37*4c559366SFrank Li enum: 38*4c559366SFrank Li - base_usb0_clk 39*4c559366SFrank Li - base_periph_clk 40*4c559366SFrank Li - base_usb1_clk 41*4c559366SFrank Li - base_cpu_clk 42*4c559366SFrank Li - base_spifi_clk 43*4c559366SFrank Li - base_spi_clk 44*4c559366SFrank Li - base_apb1_clk 45*4c559366SFrank Li - base_apb3_clk 46*4c559366SFrank Li - base_adchs_clk 47*4c559366SFrank Li - base_sdio_clk 48*4c559366SFrank Li - base_ssp0_clk 49*4c559366SFrank Li - base_ssp1_clk 50*4c559366SFrank Li - base_uart0_clk 51*4c559366SFrank Li - base_uart1_clk 52*4c559366SFrank Li - base_uart2_clk 53*4c559366SFrank Li - base_uart3_clk 54*4c559366SFrank Li - base_audio_clk 55*4c559366SFrank Li description: 56*4c559366SFrank Li Which branch clocks that are available on the CCU depends on the 57*4c559366SFrank Li specific LPC part. Check the user manual for your specific part. 58*4c559366SFrank Li 59*4c559366SFrank Li A list of CCU clocks can be found in dt-bindings/clock/lpc18xx-ccu.h. 60*4c559366SFrank Li 61*4c559366SFrank Lirequired: 62*4c559366SFrank Li - compatible 63*4c559366SFrank Li - reg 64*4c559366SFrank Li - '#clock-cells' 65*4c559366SFrank Li - clocks 66*4c559366SFrank Li - clock-names 67*4c559366SFrank Li 68*4c559366SFrank LiadditionalProperties: false 69*4c559366SFrank Li 70*4c559366SFrank Liexamples: 71*4c559366SFrank Li - | 72*4c559366SFrank Li #include <dt-bindings/clock/lpc18xx-cgu.h> 73*4c559366SFrank Li 74*4c559366SFrank Li clock-controller@40051000 { 75*4c559366SFrank Li compatible = "nxp,lpc1850-ccu"; 76*4c559366SFrank Li reg = <0x40051000 0x1000>; 77*4c559366SFrank Li #clock-cells = <1>; 78*4c559366SFrank Li clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>, 79*4c559366SFrank Li <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>, 80*4c559366SFrank Li <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK>, 81*4c559366SFrank Li <&cgu BASE_USB1_CLK>, <&cgu BASE_SPI_CLK>; 82*4c559366SFrank Li clock-names = "base_apb3_clk", "base_apb1_clk", 83*4c559366SFrank Li "base_spifi_clk", "base_cpu_clk", 84*4c559366SFrank Li "base_periph_clk", "base_usb0_clk", 85*4c559366SFrank Li "base_usb1_clk", "base_spi_clk"; 86*4c559366SFrank Li }; 87*4c559366SFrank Li 88*4c559366SFrank Li - | 89*4c559366SFrank Li #include <dt-bindings/clock/lpc18xx-cgu.h> 90*4c559366SFrank Li 91*4c559366SFrank Li clock-controller@40052000 { 92*4c559366SFrank Li compatible = "nxp,lpc1850-ccu"; 93*4c559366SFrank Li reg = <0x40052000 0x1000>; 94*4c559366SFrank Li #clock-cells = <1>; 95*4c559366SFrank Li clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>, 96*4c559366SFrank Li <&cgu BASE_UART2_CLK>, <&cgu BASE_UART1_CLK>, 97*4c559366SFrank Li <&cgu BASE_UART0_CLK>, <&cgu BASE_SSP1_CLK>, 98*4c559366SFrank Li <&cgu BASE_SSP0_CLK>, <&cgu BASE_SDIO_CLK>; 99*4c559366SFrank Li clock-names = "base_audio_clk", "base_uart3_clk", 100*4c559366SFrank Li "base_uart2_clk", "base_uart1_clk", 101*4c559366SFrank Li "base_uart0_clk", "base_ssp1_clk", 102*4c559366SFrank Li "base_ssp0_clk", "base_sdio_clk"; 103*4c559366SFrank Li }; 104*4c559366SFrank Li 105