xref: /linux/Documentation/devicetree/bindings/clock/nxp,lpc1850-ccu.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/nxp,lpc1850-ccu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP LPC1850 Clock Control Unit (CCU)
8
9description:
10  Each CGU base clock has several clock branches which can be turned on
11  or off independently by the Clock Control Units CCU1 or CCU2. The
12  branch clocks are distributed between CCU1 and CCU2.
13
14  Above text taken from NXP LPC1850 User Manual
15
16maintainers:
17  - Frank Li <Frank.Li@nxp.com>
18
19properties:
20  compatible:
21    const: nxp,lpc1850-ccu
22
23  reg:
24    maxItems: 1
25
26  '#clock-cells':
27    const: 1
28
29  clocks:
30    minItems: 1
31    maxItems: 8
32
33  clock-names:
34    minItems: 1
35    maxItems: 8
36    items:
37      enum:
38        - base_usb0_clk
39        - base_periph_clk
40        - base_usb1_clk
41        - base_cpu_clk
42        - base_spifi_clk
43        - base_spi_clk
44        - base_apb1_clk
45        - base_apb3_clk
46        - base_adchs_clk
47        - base_sdio_clk
48        - base_ssp0_clk
49        - base_ssp1_clk
50        - base_uart0_clk
51        - base_uart1_clk
52        - base_uart2_clk
53        - base_uart3_clk
54        - base_audio_clk
55    description:
56      Which branch clocks that are available on the CCU depends on the
57      specific LPC part. Check the user manual for your specific part.
58
59      A list of CCU clocks can be found in dt-bindings/clock/lpc18xx-ccu.h.
60
61required:
62  - compatible
63  - reg
64  - '#clock-cells'
65  - clocks
66  - clock-names
67
68additionalProperties: false
69
70examples:
71  - |
72    #include <dt-bindings/clock/lpc18xx-cgu.h>
73
74    clock-controller@40051000 {
75        compatible = "nxp,lpc1850-ccu";
76        reg = <0x40051000 0x1000>;
77        #clock-cells = <1>;
78        clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>,
79                 <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>,
80                 <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK>,
81                 <&cgu BASE_USB1_CLK>, <&cgu BASE_SPI_CLK>;
82        clock-names = "base_apb3_clk",   "base_apb1_clk",
83                      "base_spifi_clk",  "base_cpu_clk",
84                      "base_periph_clk", "base_usb0_clk",
85                      "base_usb1_clk",   "base_spi_clk";
86    };
87
88  - |
89    #include <dt-bindings/clock/lpc18xx-cgu.h>
90
91    clock-controller@40052000 {
92        compatible = "nxp,lpc1850-ccu";
93        reg = <0x40052000 0x1000>;
94        #clock-cells = <1>;
95        clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>,
96                 <&cgu BASE_UART2_CLK>, <&cgu BASE_UART1_CLK>,
97                 <&cgu BASE_UART0_CLK>, <&cgu BASE_SSP1_CLK>,
98                 <&cgu BASE_SSP0_CLK>,  <&cgu BASE_SDIO_CLK>;
99        clock-names = "base_audio_clk", "base_uart3_clk",
100                      "base_uart2_clk", "base_uart1_clk",
101                      "base_uart0_clk", "base_ssp1_clk",
102                      "base_ssp0_clk",  "base_sdio_clk";
103    };
104
105