xref: /linux/Documentation/devicetree/bindings/clock/moxa,moxart-clock.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/moxa,moxart-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MOXA ART Clock Controllers
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description:
13  MOXA ART SoCs allow to determine PLL output and APB frequencies by reading
14  registers holding multiplier and divisor information.
15
16properties:
17  compatible:
18    enum:
19      - moxa,moxart-apb-clock
20      - moxa,moxart-pll-clock
21
22  "#clock-cells":
23    const: 0
24
25  reg:
26    maxItems: 1
27
28  clocks:
29    maxItems: 1
30
31  clock-output-names: true
32
33additionalProperties: false
34
35required:
36  - compatible
37  - "#clock-cells"
38  - reg
39