1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/eswin,eic7700-hspcrg.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ESWIN EIC7700 HSP Clock and Reset Generator 8 9maintainers: 10 - Xuyang Dong <dongxuyang@eswincomputing.com> 11 12description: 13 Clock and reset generator for the ESWIN EIC7700 HSP (high-speed peripherals). 14 15properties: 16 compatible: 17 const: eswin,eic7700-hspcrg 18 19 reg: 20 maxItems: 1 21 22 clocks: 23 items: 24 - description: HSP configuration top clock 25 - description: MMC top clock 26 - description: SATA top clock 27 28 clock-names: 29 items: 30 - const: cfg 31 - const: mmc 32 - const: sata 33 34 '#clock-cells': 35 const: 1 36 description: 37 See <dt-bindings/clock/eswin,eic7700-hspcrg.h> for valid indices. 38 39 '#reset-cells': 40 const: 1 41 description: 42 See <dt-bindings/reset/eswin,eic7700-hspcrg.h> for valid indices. 43 44required: 45 - compatible 46 - reg 47 - clocks 48 - clock-names 49 - '#clock-cells' 50 - '#reset-cells' 51 52additionalProperties: false 53 54examples: 55 - | 56 clock-controller@50440000 { 57 compatible = "eswin,eic7700-hspcrg"; 58 reg = <0x50440000 0x2000>; 59 clocks = <&clock 171>, <&clock 254>, <&clock 187>; 60 clock-names = "cfg", "mmc", "sata"; 61 #clock-cells = <1>; 62 #reset-cells = <1>; 63 }; 64