xref: /linux/Documentation/devicetree/bindings/clock/apm,xgene-socpll-clock.yaml (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/apm,xgene-socpll-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: APM X-Gene SoC PLL, PCPPLL, and PMD clocks
8
9maintainers:
10  - Khuong Dinh <khuong@os.amperecomputing.com>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - apm,xgene-pcppll-clock
17          - apm,xgene-pcppll-v2-clock
18          - apm,xgene-pmd-clock
19          - apm,xgene-socpll-clock
20          - apm,xgene-socpll-v2-clock
21
22  reg:
23    maxItems: 1
24
25  reg-names:
26    items:
27      - enum: [ csr-reg, div-reg ]
28      - const: div-reg
29    minItems: 1
30
31  clocks:
32    maxItems: 1
33
34  clock-names:
35    enum: [ pcppll, socpll ]
36
37  "#clock-cells":
38    const: 1
39
40  clock-output-names:
41    maxItems: 1
42
43required:
44  - compatible
45  - reg
46  - clocks
47  - '#clock-cells'
48  - clock-output-names
49
50additionalProperties: false
51