1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/ata/st,ahci.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics STi SATA controller 8 9maintainers: 10 - Patrice Chotard <patrice.chotard@foss.st.com> 11 12allOf: 13 - $ref: ahci-common.yaml# 14 15properties: 16 compatible: 17 const: st,ahci 18 19 interrupt-names: 20 items: 21 - const: hostc 22 23 clocks: 24 maxItems: 1 25 26 clock-names: 27 items: 28 - const: ahci_clk 29 30 resets: 31 items: 32 - description: Power-down line 33 - description: Soft-reset line 34 - description: Power-reset line 35 36 reset-names: 37 items: 38 - const: pwr-dwn 39 - const: sw-rst 40 - const: pwr-rst 41 42required: 43 - compatible 44 - interrupt-names 45 - phys 46 - phy-names 47 - clocks 48 - clock-names 49 50unevaluatedProperties: false 51 52examples: 53 - | 54 #include <dt-bindings/interrupt-controller/arm-gic.h> 55 #include <dt-bindings/phy/phy.h> 56 #include <dt-bindings/reset/stih407-resets.h> 57 #include <dt-bindings/clock/stih407-clks.h> 58 59 sata@9b20000 { 60 compatible = "st,ahci"; 61 reg = <0x9b20000 0x1000>; 62 interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>; 63 interrupt-names = "hostc"; 64 phys = <&phy_port0 PHY_TYPE_SATA>; 65 phy-names = "sata-phy"; 66 resets = <&powerdown STIH407_SATA0_POWERDOWN>, 67 <&softreset STIH407_SATA0_SOFTRESET>, 68 <&softreset STIH407_SATA0_PWR_SOFTRESET>; 69 reset-names = "pwr-dwn", "sw-rst", "pwr-rst"; 70 clocks = <&clk_s_c0_flexgen CLK_ICN_REG>; 71 clock-names = "ahci_clk"; 72 }; 73