xref: /linux/Documentation/devicetree/bindings/arm/microchip,sama7g5-chipid.yaml (revision 31b43c079f9aa55754c20404a42bca9a49e01f60)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/microchip,sama7g5-chipid.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Atmel/Microchip RAMC SDRAM/DDR Controller
8
9maintainers:
10  - Nicolas Ferre <nicolas.ferre@microchip.com>
11  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
12
13description:
14  This binding describes the Atmel/Microchip Chip ID register block used
15  for SoC identification and revision information. It requires compatible
16  strings matching specific SoC families and a reg property defining the
17  register address and size.
18
19properties:
20  compatible:
21    enum:
22      - atmel,sama5d2-chipid
23      - microchip,sama7d65-chipid
24      - microchip,sama7g5-chipid
25
26  reg:
27    maxItems: 1
28
29required:
30  - compatible
31  - reg
32
33unevaluatedProperties: false
34
35examples:
36  - |
37    chipid@fc069000 {
38        compatible = "atmel,sama5d2-chipid";
39        reg = <0xfc069000 0x8>;
40    };
41...
42