1==================================================================== 2Marvell Odyssey LLC-TAD Performance Monitoring Unit (PMU UNCORE) 3==================================================================== 4 5Each TAD provides eight 64-bit counters for monitoring 6cache behavior.The driver always configures the same counter for 7all the TADs. The user would end up effectively reserving one of 8eight counters in every TAD to look across all TADs. 9The occurrences of events are aggregated and presented to the user 10at the end of running the workload. The driver does not provide a 11way for the user to partition TADs so that different TADs are used for 12different applications. 13 14The performance events reflect various internal or interface activities. 15By combining the values from multiple performance counters, cache 16performance can be measured in terms such as: cache miss rate, cache 17allocations, interface retry rate, internal resource occupancy, etc. 18 19The PMU driver exposes the available events and format options under sysfs:: 20 21 /sys/bus/event_source/devices/tad/events/ 22 /sys/bus/event_source/devices/tad/format/ 23 24Examples:: 25 26 $ perf list | grep tad 27 tad/tad_alloc_any/ [Kernel PMU event] 28 tad/tad_alloc_dtg/ [Kernel PMU event] 29 tad/tad_alloc_ltg/ [Kernel PMU event] 30 tad/tad_hit_any/ [Kernel PMU event] 31 tad/tad_hit_dtg/ [Kernel PMU event] 32 tad/tad_hit_ltg/ [Kernel PMU event] 33 tad/tad_req_msh_in_exlmn/ [Kernel PMU event] 34 tad/tad_tag_rd/ [Kernel PMU event] 35 tad/tad_tot_cycle/ [Kernel PMU event] 36 37 $ perf stat -e tad_alloc_dtg,tad_alloc_ltg,tad_alloc_any,tad_hit_dtg,tad_hit_ltg,tad_hit_any,tad_tag_rd <workload> 38