1HID Driver Description 2MLNXBFD0 mlxbf-pmc Performance counters (BlueField-1) 3MLNXBFD1 mlxbf-pmc Performance counters (BlueField-2) 4MLNXBFD2 mlxbf-pmc Performance counters (BlueField-3) 5 6What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/event_list 7Date: Dec 2020 8KernelVersion: 5.10 9Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 10Description: 11 List of events supported by the counters in the specific block. 12 It is used to extract the event number or ID associated with 13 each event. 14 15What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/event<N> 16Date: Dec 2020 17KernelVersion: 5.10 18Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 19Description: 20 Event monitored by corresponding counter. This is used to 21 program or read back the event that should be or is currently 22 being monitored by counter<N>. 23 24What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/counter<N> 25Date: Dec 2020 26KernelVersion: 5.10 27Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 28Description: 29 Counter value of the event being monitored. This is used to 30 read the counter value of the event which was programmed using 31 event<N>. This is also used to clear or reset the counter value 32 by writing 0 to the counter sysfs. 33 34What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/enable 35Date: Dec 2020 36KernelVersion: 5.10 37Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 38Description: 39 Start or stop counters. This is used to start the counters 40 for monitoring the programmed events and also to stop the 41 counters after the desired duration. Writing value 1 will 42 start all the counters in the block, and writing 0 will 43 stop all the counters together. 44 45What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/<reg> 46Date: Dec 2020 47KernelVersion: 5.10 48Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 49Description: 50 Value of register. This is used to read or reset the registers 51 where various performance statistics are counted for each block. 52 Writing 0 to the sysfs will clear the counter, writing any other 53 value is not allowed. 54 55What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/count_clock 56Date: Mar 2025 57KernelVersion: 6.14 58Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>" 59Description: 60 Use a counter for counting cycles. This is used to repurpose/dedicate 61 any of the counters in the block to counting cycles. Each counter is 62 represented by a bit (bit 0 for counter0, bit1 for counter1 and so on) 63 and setting the corresponding bit will reserve that specific counter 64 for counting cycles and override the event<N> setting. 65