1What: /sys/devices/*/<our-device>/fuse 2Date: February 2014 3Contact: Peter De Schrijver <pdeschrijver@nvidia.com> 4Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114 5 and Tegra124 SoC's from NVIDIA. The efuses contain write once 6 data programmed at the factory. The data is laid out in 32bit 7 words in LSB first format. Each bit represents a single value 8 as decoded from the fuse registers. Bits order/assignment 9 exactly matches the HW registers, including any unused bits. 10Users: any user space application which wants to read the efuses on 11 Tegra SoC's 12