xref: /linux/Documentation/ABI/testing/debugfs-amd-iommu (revision 53564f400572b1b8d9ee5bafb9c226eb1d38600a)
1What:		/sys/kernel/debug/iommu/amd/iommu<x>/mmio
2Date:		January 2025
3Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
4Description:
5		This file provides read/write access for user input. Users specify the
6		MMIO register offset for iommu<x>, and the file outputs the corresponding
7		MMIO register value of iommu<x>
8
9		Example::
10
11		  $ echo "0x18" > /sys/kernel/debug/iommu/amd/iommu00/mmio
12		  $ cat /sys/kernel/debug/iommu/amd/iommu00/mmio
13
14		Output::
15
16		  Offset:0x18 Value:0x000c22000003f48d
17
18What:		/sys/kernel/debug/iommu/amd/iommu<x>/capability
19Date:		January 2025
20Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
21Description:
22		This file provides read/write access for user input. Users specify the
23		capability register offset for iommu<x>, and the file outputs the
24		corresponding capability register value of iommu<x>.
25
26		Example::
27
28		  $ echo "0x10" > /sys/kernel/debug/iommu/amd/iommu00/capability
29		  $ cat /sys/kernel/debug/iommu/amd/iommu00/capability
30
31		Output::
32
33		  Offset:0x10 Value:0x00203040
34
35What:		/sys/kernel/debug/iommu/amd/iommu<x>/cmdbuf
36Date:		January 2025
37Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
38Description:
39		This file is a read-only output file containing iommu<x> command
40		buffer entries.
41
42		Examples::
43
44		  $ cat /sys/kernel/debug/iommu/amd/iommu<x>/cmdbuf
45
46		Output::
47
48		  CMD Buffer Head Offset:339 Tail Offset:339
49		    0: 00835001 10000001 00003c00 00000000
50		    1: 00000000 30000005 fffff003 7fffffff
51		    2: 00835001 10000001 00003c01 00000000
52		    3: 00000000 30000005 fffff003 7fffffff
53		    4: 00835001 10000001 00003c02 00000000
54		    5: 00000000 30000005 fffff003 7fffffff
55		    6: 00835001 10000001 00003c03 00000000
56		    7: 00000000 30000005 fffff003 7fffffff
57		    8: 00835001 10000001 00003c04 00000000
58		    9: 00000000 30000005 fffff003 7fffffff
59		   10: 00835001 10000001 00003c05 00000000
60		   11: 00000000 30000005 fffff003 7fffffff
61		  [...]
62
63What:		/sys/kernel/debug/iommu/amd/devid
64Date:		January 2025
65Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
66Description:
67		This file provides read/write access for user input. Users specify the
68		device ID, which can be used to dump IOMMU data structures such as the
69		interrupt remapping table and device table.
70
71		Example:
72
73		1.
74		  ::
75
76		    $ echo 0000:01:00.0 > /sys/kernel/debug/iommu/amd/devid
77		    $ cat /sys/kernel/debug/iommu/amd/devid
78
79		  Output::
80
81		    0000:01:00.0
82
83		2.
84		  ::
85
86		    $ echo 01:00.0 > /sys/kernel/debug/iommu/amd/devid
87		    $ cat /sys/kernel/debug/iommu/amd/devid
88
89		  Output::
90
91		    0000:01:00.0
92
93What:		/sys/kernel/debug/iommu/amd/devtbl
94Date:		January 2025
95Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
96Description:
97		This file is a read-only output file containing the device table entry
98		for the device ID provided in /sys/kernel/debug/iommu/amd/devid.
99
100		Example::
101
102		  $ cat /sys/kernel/debug/iommu/amd/devtbl
103
104		Output::
105
106		  DeviceId             QWORD[3]         QWORD[2]         QWORD[1]         QWORD[0] iommu
107		  0000:01:00.0 0000000000000000 20000001373b8013 0000000000000038 6000000114d7b603 iommu3
108
109What:		/sys/kernel/debug/iommu/amd/irqtbl
110Date:		January 2025
111Contact:	Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
112Description:
113		This file is a read-only output file containing valid IRT table entries
114		for the device ID provided in /sys/kernel/debug/iommu/amd/devid.
115
116		Example::
117
118		  $ cat /sys/kernel/debug/iommu/amd/irqtbl
119
120		Output::
121
122		  DeviceId 0000:01:00.0
123		  IRT[0000] 0000000000000020 0000000000000241
124		  IRT[0001] 0000000000000020 0000000000000841
125		  IRT[0002] 0000000000000020 0000000000002041
126		  IRT[0003] 0000000000000020 0000000000008041
127		  IRT[0004] 0000000000000020 0000000000020041
128		  IRT[0005] 0000000000000020 0000000000080041
129		  IRT[0006] 0000000000000020 0000000000200041
130		  IRT[0007] 0000000000000020 0000000000800041
131		  [...]
132