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Searched refs:wr32 (Results 1 – 25 of 80) sorted by relevance

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/linux/drivers/net/ethernet/wangxun/libwx/
H A Dwx_hw.c27 wr32(wx, WX_MSCA, command); in wx_phy_read_reg_mdi()
32 wr32(wx, WX_MSCC, command); in wx_phy_read_reg_mdi()
56 wr32(wx, WX_MSCA, command); in wx_phy_write_reg_mdi()
61 wr32(wx, WX_MSCC, command); in wx_phy_write_reg_mdi()
76 wr32(wx, WX_MDIO_CLAUSE_SELECT, 0xF); in wx_phy_read_reg_mdi_c22()
85 wr32(wx, WX_MDIO_CLAUSE_SELECT, 0xF); in wx_phy_write_reg_mdi_c22()
94 wr32(wx, WX_MDIO_CLAUSE_SELECT, 0); in wx_phy_read_reg_mdi_c45()
104 wr32(wx, WX_MDIO_CLAUSE_SELECT, 0); in wx_phy_write_reg_mdi_c45()
115 wr32(wx, WX_PX_IMS(0), mask); in wx_intr_disable()
120 wr32(wx, WX_PX_IMS(1), mask); in wx_intr_disable()
[all …]
H A Dwx_sriov.c246 wr32(wx, WX_PSR_VM_L2CTL(vf), vmolr); in wx_set_vmolr()
254 wr32(wx, WX_TDM_VLAN_INS(vf), vmvir); in wx_set_vmvir()
275 wr32(wx, WX_TDM_VLAN_AS(index), pfvfspoof); in wx_set_vlan_anti_spoofing()
295 wr32(wx, WX_RDM_PF_QDE(n), reg); in wx_write_qde()
300 wr32(wx, WX_TDM_VLAN_INS(vf), 0); in wx_clear_vmvir()
325 wr32(wx, WX_TDM_VF_TE(index), reg_req_tx); in wx_set_vf_rx_tx()
327 wr32(wx, WX_RDM_VF_RE(index), reg_req_rx); in wx_set_vf_rx_tx()
333 wr32(wx, WX_TDM_VFTE_CLR(index), reg_req_tx); in wx_set_vf_rx_tx()
335 wr32(wx, WX_RDM_VFRE_CLR(index), reg_req_rx); in wx_set_vf_rx_tx()
421 wr32(wx, WX_RDM_VFRE_CLR(index), reg); in wx_vf_reset_msg()
[all …]
H A Dwx_mbx.c22 wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_PFU); in wx_obtain_mbx_lock_pf()
42 wr32(wx, WX_MBVFICR(index), mask); in wx_check_for_bit_pf()
117 wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_STS); in wx_write_mbx_pf()
152 wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_ACK); in wx_read_mbx_pf()
173 wr32(wx, WX_VFLREC(reg_offset), BIT(vf_shift)); in wx_check_for_rst_pf()
190 wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_VFU); in wx_mailbox_get_lock_vf()
367 wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_REQ); in wx_write_mbx_vf()
399 wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_ACK); in wx_read_mbx_vf()
H A Dwx_vf.c101 wr32(wx, WX_VX_PF_BME, WX_VF_BME_ENABLE); in wx_reset_hw_vf()
142 wr32(wx, WX_VXIMS, WX_VF_IRQ_CLEAR_MASK); in wx_stop_adapter_vf()
145 wr32(wx, WX_VXICR, U32_MAX); in wx_stop_adapter_vf()
149 wr32(wx, WX_VXTXDCTL(i), WX_VXTXDCTL_FLUSH); in wx_stop_adapter_vf()
155 wr32(wx, WX_VXRXDCTL(i), reg_val); in wx_stop_adapter_vf()
158 wr32(wx, WX_VXMRQC, 0); in wx_stop_adapter_vf()
/linux/drivers/net/ethernet/intel/igc/
H A Digc_tsn.c284 wr32(IGC_GTXOFFSET, txoffset); in igc_tsn_adjust_txtime_offset()
293 wr32(IGC_RETX_CTL, retxctl); in igc_tsn_restore_retx_default()
328 wr32(IGC_TXARB, txarb); in igc_tsn_tx_arb()
351 wr32(IGC_RXPBS, rxpbs); in igc_tsn_set_rxpbsize()
363 wr32(IGC_GTXOFFSET, 0); in igc_tsn_disable_offload()
364 wr32(IGC_TXPBS, IGC_TXPBSIZE_DEFAULT); in igc_tsn_disable_offload()
365 wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); in igc_tsn_disable_offload()
377 wr32(IGC_TQAVCTRL, tqavctrl); in igc_tsn_disable_offload()
383 wr32(IGC_TXQCTL(i), 0); in igc_tsn_disable_offload()
384 wr32(IGC_STQT(i), 0); in igc_tsn_disable_offload()
[all …]
H A Digc_base.c32 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base()
34 wr32(IGC_RCTL, 0); in igc_reset_hw_base()
35 wr32(IGC_TCTL, IGC_TCTL_PSP); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
55 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base()
119 wr32(IGC_CTRL, ctrl); in igc_setup_copper_link_base()
344 wr32(IGC_RFCTL, rfctl); in igc_rx_fifo_flush_base()
352 wr32(IGC_RXDCTL(i), in igc_rx_fifo_flush_base()
372 wr32(IGC_RFCTL, rfctl & ~IGC_RFCTL_LEF); in igc_rx_fifo_flush_base()
375 wr32(IGC_RLPML, 0); in igc_rx_fifo_flush_base()
[all …]
H A Digc_ptp.c43 wr32(IGC_SYSTIML, ts->tv_nsec); in igc_ptp_write_i225()
44 wr32(IGC_SYSTIMH, ts->tv_sec); in igc_ptp_write_i225()
68 wr32(IGC_TIMINCA, inca); in igc_ptp_adjfine_i225()
205 wr32(IGC_TSSDP, tssdp); in igc_pin_perout()
206 wr32(IGC_CTRL, ctrl); in igc_pin_perout()
207 wr32(IGC_CTRL_EXT, ctrl_ext); in igc_pin_perout()
241 wr32(IGC_TSSDP, tssdp); in igc_pin_extts()
242 wr32(IGC_CTRL, ctrl); in igc_pin_extts()
243 wr32(IGC_CTRL_EXT, ctrl_ext); in igc_pin_extts()
290 wr32(IGC_TSAUXC, tsauxc); in igc_ptp_feature_enable_i225()
[all …]
H A Digc_mac.c29 wr32(IGC_CTRL, ctrl); in igc_disable_pcie_master()
103 wr32(IGC_FCRTL, fcrtl); in igc_set_fc_watermarks()
104 wr32(IGC_FCRTH, fcrth); in igc_set_fc_watermarks()
154 wr32(IGC_FCT, FLOW_CONTROL_TYPE); in igc_setup_link()
155 wr32(IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in igc_setup_link()
156 wr32(IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igc_setup_link()
158 wr32(IGC_FCTTV, hw->fc.pause_time); in igc_setup_link()
223 wr32(IGC_CTRL, ctrl); in igc_force_mac_fc()
341 wr32(IGC_RAL(index), rar_low); in igc_rar_set()
343 wr32(IGC_RAH(index), rar_high); in igc_rar_set()
[all …]
H A Digc_main.c117 wr32(IGC_VET, ETH_P_8021Q); in igc_reset()
159 wr32(IGC_CTRL_EXT, in igc_release_hw_control()
178 wr32(IGC_CTRL_EXT, in igc_get_hw_control()
335 wr32(IGC_TXDCTL(idx), txdctl); in igc_disable_tx_ring_hw()
659 wr32(IGC_RXDCTL(reg_idx), 0); in igc_configure_rx_ring()
662 wr32(IGC_RDBAL(reg_idx), in igc_configure_rx_ring()
664 wr32(IGC_RDBAH(reg_idx), rdba >> 32); in igc_configure_rx_ring()
665 wr32(IGC_RDLEN(reg_idx), in igc_configure_rx_ring()
670 wr32(IGC_RDH(reg_idx), 0); in igc_configure_rx_ring()
691 wr32(IGC_SRRCTL(reg_idx), srrctl); in igc_configure_rx_ring()
[all …]
/linux/drivers/net/ethernet/intel/igb/
H A Digb_ptp.c141 wr32(E1000_SYSTIML, ts->tv_nsec); in igb_ptp_write_i210()
142 wr32(E1000_SYSTIMH, (u32)ts->tv_sec); in igb_ptp_write_i210()
203 wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK)); in igb_ptp_adjfine_82576()
223 wr32(E1000_TIMINCA, inca); in igb_ptp_adjfine_82580()
418 wr32(E1000_TSSDP, tssdp); in igb_pin_extts()
419 wr32(E1000_CTRL, ctrl); in igb_pin_extts()
420 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_extts()
484 wr32(E1000_TSSDP, tssdp); in igb_pin_perout()
485 wr32(E1000_CTRL, ctrl); in igb_pin_perout()
486 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pin_perout()
[all …]
H A De1000_mac.c243 wr32(E1000_VLVF(vlvf_index), 0); in igb_vfta_set()
266 wr32(E1000_VLVF(vlvf_index), bits | vlan | E1000_VLVF_VLANID_ENABLE); in igb_vfta_set()
377 wr32(E1000_RAL(index), rar_low); in igb_rar_set()
379 wr32(E1000_RAH(index), rar_high); in igb_rar_set()
716 wr32(E1000_FCT, FLOW_CONTROL_TYPE); in igb_setup_link()
717 wr32(E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH); in igb_setup_link()
718 wr32(E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igb_setup_link()
720 wr32(E1000_FCTTV, hw->fc.pause_time); in igb_setup_link()
746 wr32(E1000_TCTL, tctl); in igb_config_collision_dist()
779 wr32(E1000_FCRTL, fcrtl); in igb_set_fc_watermarks()
[all …]
H A Digb_main.c560 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_data()
583 wr32(E1000_I2CPARAMS, i2cctl); in igb_set_i2c_clk()
862 wr32(E1000_CTRL_EXT, tmp); in igb_configure_msix()
879 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE | in igb_configure_msix()
887 wr32(E1000_IVAR_MISC, tmp); in igb_configure_msix()
1130 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ); in igb_set_interrupt_capability()
1471 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1472 wr32(E1000_EIMC, adapter->eims_enable_mask); in igb_irq_disable()
1474 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1477 wr32(E1000_IAM, 0); in igb_irq_disable()
[all …]
H A De1000_mbx.c249 wr32(E1000_MBVFICR, mask); in igb_check_for_bit_pf()
307 wr32(E1000_VFLRE, BIT(vf_number)); in igb_check_for_rst_pf()
329 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); in igb_obtain_mbx_lock_pf()
357 wr32(E1000_P2VMAILBOX(vf_number), in igb_release_mbx_lock_pf()
392 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS); in igb_write_mbx_pf()
431 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK); in igb_read_mbx_pf()
433 wr32(E1000_P2VMAILBOX(vf_number), in igb_read_mbx_pf()
H A Digb_ethtool.c1226 wr32(reg, (_test[pat] & write)); in reg_pattern_test()
1246 wr32(reg, write & mask); in reg_set_and_check()
1310 wr32(E1000_STATUS, toggle); in igb_reg_test()
1320 wr32(E1000_STATUS, before); in igb_reg_test()
1419 wr32(E1000_IVAR_MISC, E1000_IVAR_VALID << 8); in igb_intr_test()
1420 wr32(E1000_EIMS, BIT(0)); in igb_intr_test()
1440 wr32(E1000_IMC, ~0); in igb_intr_test()
1484 wr32(E1000_ICR, ~0); in igb_intr_test()
1486 wr32(E1000_IMC, mask); in igb_intr_test()
1487 wr32(E1000_ICS, mask); in igb_intr_test()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c316 wr32(hw, I40E_PRTTSYN_TIME_L, ns & 0xFFFFFFFF); in i40e_ptp_write()
317 wr32(hw, I40E_PRTTSYN_TIME_H, ns >> 32); in i40e_ptp_write()
358 wr32(hw, I40E_PRTTSYN_INC_L, adj & 0xFFFFFFFF); in i40e_ptp_adjfine()
359 wr32(hw, I40E_PRTTSYN_INC_H, adj >> 32); in i40e_ptp_adjfine()
376 wr32(hw, I40E_PRTTSYN_AUX_0(1), 0); in i40e_ptp_set_1pps_signal_hw()
377 wr32(hw, I40E_PRTTSYN_AUX_1(1), I40E_PRTTSYN_AUX_1_INSTNT); in i40e_ptp_set_1pps_signal_hw()
378 wr32(hw, I40E_PRTTSYN_AUX_0(1), I40E_PRTTSYN_AUX_0_OUT_ENABLE); in i40e_ptp_set_1pps_signal_hw()
386 wr32(hw, I40E_PRTTSYN_TGT_L(1), ns & 0xFFFFFFFF); in i40e_ptp_set_1pps_signal_hw()
388 wr32(hw, I40E_PRTTSYN_TGT_H(1), ns >> 32); in i40e_ptp_set_1pps_signal_hw()
389 wr32(hw, I40E_PRTTSYN_CLKO(1), I40E_PTP_HALF_SECOND); in i40e_ptp_set_1pps_signal_hw()
[all …]
H A Di40e_hmc.h112 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
113 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
114 wr32((hw), I40E_PFHMC_SDCMD, val3); \
131 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
132 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
133 wr32((hw), I40E_PFHMC_SDCMD, val3); \
143 wr32((hw), I40E_PFHMC_PDINV, \
H A Di40e_adminq.c236 wr32(hw, I40E_PF_ATQH, 0); in i40e_config_asq_regs()
237 wr32(hw, I40E_PF_ATQT, 0); in i40e_config_asq_regs()
240 wr32(hw, I40E_PF_ATQLEN, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
242 wr32(hw, I40E_PF_ATQBAL, lower_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
243 wr32(hw, I40E_PF_ATQBAH, upper_32_bits(hw->aq.asq.desc_buf.pa)); in i40e_config_asq_regs()
265 wr32(hw, I40E_PF_ARQH, 0); in i40e_config_arq_regs()
266 wr32(hw, I40E_PF_ARQT, 0); in i40e_config_arq_regs()
269 wr32(hw, I40E_PF_ARQLEN, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
271 wr32(hw, I40E_PF_ARQBAL, lower_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
272 wr32(hw, I40E_PF_ARQBAH, upper_32_bits(hw->aq.arq.desc_buf.pa)); in i40e_config_arq_regs()
[all …]
H A Di40e_dcb.c1296 wr32(hw, I40E_PRTDCB_RETSC, reg); in i40e_dcb_hw_rx_fifo_config()
1351 wr32(hw, I40E_PRT_SWR_PM_THR, reg); in i40e_dcb_hw_rx_cmd_monitor_config()
1356 wr32(hw, I40E_PRTDCB_RPPMC, reg); in i40e_dcb_hw_rx_cmd_monitor_config()
1401 wr32(hw, I40E_PRTDCB_MFLCN, reg); in i40e_dcb_hw_pfc_config()
1408 wr32(hw, I40E_PRTDCB_FCCFG, reg); in i40e_dcb_hw_pfc_config()
1415 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_GPP, reg); in i40e_dcb_hw_pfc_config()
1421 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_ENABLE_PPP, reg); in i40e_dcb_hw_pfc_config()
1427 wr32(hw, I40E_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE, reg); in i40e_dcb_hw_pfc_config()
1433 wr32(hw, I40E_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE, reg); in i40e_dcb_hw_pfc_config()
1442 wr32(hw, I40E_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(i), reg); in i40e_dcb_hw_pfc_config()
[all …]
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_rpc.c58 wr32(fbd, FBNIC_RPC_RMI_CONFIG, in fbnic_rss_disable_hw()
86 wr32(fbd, FBNIC_RPC_RSS_TBL(0, i), fbn->indir_tbl[0][i]); in fbnic_rss_reinit_hw()
87 wr32(fbd, FBNIC_RPC_RSS_TBL(1, i), fbn->indir_tbl[1][i]); in fbnic_rss_reinit_hw()
91 wr32(fbd, FBNIC_RPC_RSS_KEY(i), fbn->rss_key[i]); in fbnic_rss_reinit_hw()
94 wr32(fbd, FBNIC_RPC_ACT_TBL0_DEFAULT, FBNIC_RPC_ACT_TBL0_DROP); in fbnic_rss_reinit_hw()
97 wr32(fbd, FBNIC_RPC_ACT_TBL1_DEFAULT, 0); in fbnic_rss_reinit_hw()
100 wr32(fbd, FBNIC_RPC_RMI_CONFIG, in fbnic_rss_reinit_hw()
563 wr32(fbd, FBNIC_RPC_TCAM_MACDA(idx, i), 0); in fbnic_clear_macda_entry()
623 wr32(fbd, FBNIC_RPC_TCAM_MACDA(idx, i), in fbnic_write_macda_entry()
629 wr32(fbd, FBNIC_RPC_TCAM_MACDA(idx, i), FBNIC_RPC_TCAM_VALIDATE); in fbnic_write_macda_entry()
[all …]
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_adminq.c241 wr32(hw, IAVF_VF_ATQH1, 0); in iavf_config_asq_regs()
242 wr32(hw, IAVF_VF_ATQT1, 0); in iavf_config_asq_regs()
245 wr32(hw, IAVF_VF_ATQLEN1, (hw->aq.num_asq_entries | in iavf_config_asq_regs()
247 wr32(hw, IAVF_VF_ATQBAL1, lower_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
248 wr32(hw, IAVF_VF_ATQBAH1, upper_32_bits(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
270 wr32(hw, IAVF_VF_ARQH1, 0); in iavf_config_arq_regs()
271 wr32(hw, IAVF_VF_ARQT1, 0); in iavf_config_arq_regs()
274 wr32(hw, IAVF_VF_ARQLEN1, (hw->aq.num_arq_entries | in iavf_config_arq_regs()
276 wr32(hw, IAVF_VF_ARQBAL1, lower_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs()
277 wr32(hw, IAVF_VF_ARQBAH1, upper_32_bits(hw->aq.arq.desc_buf.pa)); in iavf_config_arq_regs()
[all …]
/linux/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_hw.c61 wr32(wx, TXGBE_TS_CTL, TXGBE_TS_CTL_EVAL_MD); in txgbe_init_thermal_sensor_thresh()
63 wr32(wx, WX_TS_INT_EN, in txgbe_init_thermal_sensor_thresh()
65 wr32(wx, WX_TS_EN, WX_TS_EN_ENA); in txgbe_init_thermal_sensor_thresh()
68 wr32(wx, WX_TS_ALARM_THRE, 677); in txgbe_init_thermal_sensor_thresh()
70 wr32(wx, WX_TS_DALARM_THRE, 614); in txgbe_init_thermal_sensor_thresh()
195 wr32(wx, WX_MIS_RST, val | rd32(wx, WX_MIS_RST)); in txgbe_reset_hw()
207 wr32(wx, TXGBE_PX_PF_BME, 0x1); in txgbe_reset_hw()
H A Dtxgbe_aml.c27 wr32(wx, WX_GPIO_INTTYPE_LEVEL, mod_rst); in txgbe_gpio_init_aml()
28 wr32(wx, WX_GPIO_INTEN, mod_rst); in txgbe_gpio_init_aml()
33 wr32(wx, WX_GPIO_EOI, BIT(i)); in txgbe_gpio_init_aml()
48 wr32(wx, WX_GPIO_INTMASK, 0xFF); in txgbe_gpio_irq_handler_aml()
52 wr32(wx, WX_GPIO_EOI, mod_rst); in txgbe_gpio_irq_handler_aml()
56 wr32(wx, WX_GPIO_INTMASK, 0); in txgbe_gpio_irq_handler_aml()
404 wr32(wx, WX_MIS_RST, TXGBE_MIS_RST_MAC_RST(wx->bus.func)); in txgbe_reconfig_mac()
412 wr32(wx, WX_MAC_WDG_TIMEOUT, wdg); in txgbe_reconfig_mac()
413 wr32(wx, WX_MAC_RX_FLOW_CTRL, fc); in txgbe_reconfig_mac()
449 wr32(wx, TXGBE_AML_MAC_TX_CFG, txcfg | TXGBE_AML_MAC_TX_CFG_TE); in txgbe_mac_link_up_aml()
/linux/drivers/net/ethernet/intel/ice/
H A Dice_sriov.c77 wr32(&pf->hw, GLINT_DYN_CTL(i), GLINT_DYN_CTL_CLEARPBA_M); in ice_free_vf_res()
103 wr32(hw, VPINT_ALLOC(vf->vf_id), 0); in ice_dis_vf_mappings()
104 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), 0); in ice_dis_vf_mappings()
113 wr32(hw, GLINT_VECT2FUNC(v), reg); in ice_dis_vf_mappings()
117 wr32(hw, VPLAN_TX_QBASE(vf->vf_id), 0); in ice_dis_vf_mappings()
122 wr32(hw, VPLAN_RX_QBASE(vf->vf_id), 0); in ice_dis_vf_mappings()
175 wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx)); in ice_free_vfs()
252 wr32(hw, VPINT_ALLOC(vf->vf_id), reg); in ice_ena_vf_msix_mappings()
257 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), reg); in ice_ena_vf_msix_mappings()
263 wr32(hw, GLINT_VECT2FUNC(v), reg); in ice_ena_vf_msix_mappings()
[all …]
H A Dice_controlq.c265 wr32(hw, ring->head, 0); in ice_cfg_cq_regs()
266 wr32(hw, ring->tail, 0); in ice_cfg_cq_regs()
269 wr32(hw, ring->len, (num_entries | ring->len_ena_mask)); in ice_cfg_cq_regs()
270 wr32(hw, ring->bal, lower_32_bits(ring->desc_buf.pa)); in ice_cfg_cq_regs()
271 wr32(hw, ring->bah, upper_32_bits(ring->desc_buf.pa)); in ice_cfg_cq_regs()
308 wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1)); in ice_cfg_rq_regs()
473 wr32(hw, cq->sq.head, 0); in ice_shutdown_sq()
474 wr32(hw, cq->sq.tail, 0); in ice_shutdown_sq()
475 wr32(hw, cq->sq.len, 0); in ice_shutdown_sq()
476 wr32(hw, cq->sq.bal, 0); in ice_shutdown_sq()
[all …]
/linux/drivers/net/ethernet/wangxun/ngbe/
H A Dngbe_hw.c44 wr32(wx, NGBE_GPIO_DDR, 0x1); in ngbe_reset_misc()
53 wr32(wx, NGBE_GPIO_DR, swi ? 0 : NGBE_GPIO_DR_0); in ngbe_sfp_modules_txrx_powerctl()
76 wr32(wx, WX_MIS_RST, val | rd32(wx, WX_MIS_RST)); in ngbe_reset_hw()

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