1b0801256SJiawen Wu // SPDX-License-Identifier: GPL-2.0
2b0801256SJiawen Wu /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
3b0801256SJiawen Wu
4d21d2c7fSJiawen Wu #include <linux/etherdevice.h>
5d21d2c7fSJiawen Wu #include <linux/if_ether.h>
6b0801256SJiawen Wu #include <linux/string.h>
7b0801256SJiawen Wu #include <linux/iopoll.h>
8b0801256SJiawen Wu #include <linux/types.h>
9b0801256SJiawen Wu #include <linux/pci.h>
10b0801256SJiawen Wu
11b0801256SJiawen Wu #include "../libwx/wx_type.h"
12b0801256SJiawen Wu #include "../libwx/wx_hw.h"
13b0801256SJiawen Wu #include "txgbe_type.h"
14b0801256SJiawen Wu #include "txgbe_hw.h"
15b0801256SJiawen Wu
16b0801256SJiawen Wu /**
17a4414dd1SJiawen Wu * txgbe_disable_sec_tx_path - Stops the transmit data path
18a4414dd1SJiawen Wu * @wx: pointer to hardware structure
19a4414dd1SJiawen Wu *
20a4414dd1SJiawen Wu * Stops the transmit data path and waits for the HW to internally empty
21a4414dd1SJiawen Wu * the tx security block
22a4414dd1SJiawen Wu **/
txgbe_disable_sec_tx_path(struct wx * wx)23a4414dd1SJiawen Wu int txgbe_disable_sec_tx_path(struct wx *wx)
24a4414dd1SJiawen Wu {
25a4414dd1SJiawen Wu int val;
26a4414dd1SJiawen Wu
27a4414dd1SJiawen Wu wr32m(wx, WX_TSC_CTL, WX_TSC_CTL_TX_DIS, WX_TSC_CTL_TX_DIS);
28a4414dd1SJiawen Wu return read_poll_timeout(rd32, val, val & WX_TSC_ST_SECTX_RDY,
29a4414dd1SJiawen Wu 1000, 20000, false, wx, WX_TSC_ST);
30a4414dd1SJiawen Wu }
31a4414dd1SJiawen Wu
32a4414dd1SJiawen Wu /**
33a4414dd1SJiawen Wu * txgbe_enable_sec_tx_path - Enables the transmit data path
34a4414dd1SJiawen Wu * @wx: pointer to hardware structure
35a4414dd1SJiawen Wu *
36a4414dd1SJiawen Wu * Enables the transmit data path.
37a4414dd1SJiawen Wu **/
txgbe_enable_sec_tx_path(struct wx * wx)38a4414dd1SJiawen Wu void txgbe_enable_sec_tx_path(struct wx *wx)
39a4414dd1SJiawen Wu {
40a4414dd1SJiawen Wu wr32m(wx, WX_TSC_CTL, WX_TSC_CTL_TX_DIS, 0);
41a4414dd1SJiawen Wu WX_WRITE_FLUSH(wx);
42a4414dd1SJiawen Wu }
43a4414dd1SJiawen Wu
44a4414dd1SJiawen Wu /**
45b0801256SJiawen Wu * txgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
469607a3e6SJiawen Wu * @wx: pointer to hardware structure
47b0801256SJiawen Wu *
48b0801256SJiawen Wu * Inits the thermal sensor thresholds according to the NVM map
49b0801256SJiawen Wu * and save off the threshold and location values into mac.thermal_sensor_data
50b0801256SJiawen Wu **/
txgbe_init_thermal_sensor_thresh(struct wx * wx)519607a3e6SJiawen Wu static void txgbe_init_thermal_sensor_thresh(struct wx *wx)
52b0801256SJiawen Wu {
539607a3e6SJiawen Wu struct wx_thermal_sensor_data *data = &wx->mac.sensor;
54b0801256SJiawen Wu
55b0801256SJiawen Wu memset(data, 0, sizeof(struct wx_thermal_sensor_data));
56b0801256SJiawen Wu
57b0801256SJiawen Wu /* Only support thermal sensors attached to SP physical port 0 */
589607a3e6SJiawen Wu if (wx->bus.func)
59b0801256SJiawen Wu return;
60b0801256SJiawen Wu
619607a3e6SJiawen Wu wr32(wx, TXGBE_TS_CTL, TXGBE_TS_CTL_EVAL_MD);
62b0801256SJiawen Wu
639607a3e6SJiawen Wu wr32(wx, WX_TS_INT_EN,
64b0801256SJiawen Wu WX_TS_INT_EN_ALARM_INT_EN | WX_TS_INT_EN_DALARM_INT_EN);
659607a3e6SJiawen Wu wr32(wx, WX_TS_EN, WX_TS_EN_ENA);
66b0801256SJiawen Wu
67b0801256SJiawen Wu data->alarm_thresh = 100;
689607a3e6SJiawen Wu wr32(wx, WX_TS_ALARM_THRE, 677);
69b0801256SJiawen Wu data->dalarm_thresh = 90;
709607a3e6SJiawen Wu wr32(wx, WX_TS_DALARM_THRE, 614);
71b0801256SJiawen Wu }
72b0801256SJiawen Wu
73049fe536SJiawen Wu /**
74049fe536SJiawen Wu * txgbe_calc_eeprom_checksum - Calculates and returns the checksum
759607a3e6SJiawen Wu * @wx: pointer to hardware structure
76049fe536SJiawen Wu * @checksum: pointer to cheksum
77049fe536SJiawen Wu *
78049fe536SJiawen Wu * Returns a negative error code on error
79049fe536SJiawen Wu **/
txgbe_calc_eeprom_checksum(struct wx * wx,u16 * checksum)809607a3e6SJiawen Wu static int txgbe_calc_eeprom_checksum(struct wx *wx, u16 *checksum)
81049fe536SJiawen Wu {
82049fe536SJiawen Wu u16 *eeprom_ptrs = NULL;
83049fe536SJiawen Wu u16 *local_buffer;
84049fe536SJiawen Wu int status;
85049fe536SJiawen Wu u16 i;
86049fe536SJiawen Wu
879607a3e6SJiawen Wu wx_init_eeprom_params(wx);
88049fe536SJiawen Wu
89049fe536SJiawen Wu eeprom_ptrs = kvmalloc_array(TXGBE_EEPROM_LAST_WORD, sizeof(u16),
90049fe536SJiawen Wu GFP_KERNEL);
91049fe536SJiawen Wu if (!eeprom_ptrs)
92049fe536SJiawen Wu return -ENOMEM;
93049fe536SJiawen Wu /* Read pointer area */
942a441a3dSZhengchao Shao status = wx_read_ee_hostif_buffer(wx, 0, TXGBE_EEPROM_LAST_WORD, eeprom_ptrs);
95049fe536SJiawen Wu if (status != 0) {
969607a3e6SJiawen Wu wx_err(wx, "Failed to read EEPROM image\n");
97a068d33eSYueHaibing kvfree(eeprom_ptrs);
98049fe536SJiawen Wu return status;
99049fe536SJiawen Wu }
100049fe536SJiawen Wu local_buffer = eeprom_ptrs;
101049fe536SJiawen Wu
102049fe536SJiawen Wu for (i = 0; i < TXGBE_EEPROM_LAST_WORD; i++)
1039607a3e6SJiawen Wu if (i != wx->eeprom.sw_region_offset + TXGBE_EEPROM_CHECKSUM)
104049fe536SJiawen Wu *checksum += local_buffer[i];
105049fe536SJiawen Wu
106a068d33eSYueHaibing kvfree(eeprom_ptrs);
107a068d33eSYueHaibing
1085e2ea780SYueHaibing *checksum = TXGBE_EEPROM_SUM - *checksum;
1095e2ea780SYueHaibing
110049fe536SJiawen Wu return 0;
111049fe536SJiawen Wu }
112049fe536SJiawen Wu
113049fe536SJiawen Wu /**
114049fe536SJiawen Wu * txgbe_validate_eeprom_checksum - Validate EEPROM checksum
1159607a3e6SJiawen Wu * @wx: pointer to hardware structure
116049fe536SJiawen Wu * @checksum_val: calculated checksum
117049fe536SJiawen Wu *
118049fe536SJiawen Wu * Performs checksum calculation and validates the EEPROM checksum. If the
119049fe536SJiawen Wu * caller does not need checksum_val, the value can be NULL.
120049fe536SJiawen Wu **/
txgbe_validate_eeprom_checksum(struct wx * wx,u16 * checksum_val)1219607a3e6SJiawen Wu int txgbe_validate_eeprom_checksum(struct wx *wx, u16 *checksum_val)
122049fe536SJiawen Wu {
123049fe536SJiawen Wu u16 read_checksum = 0;
124049fe536SJiawen Wu u16 checksum;
125049fe536SJiawen Wu int status;
126049fe536SJiawen Wu
127049fe536SJiawen Wu /* Read the first word from the EEPROM. If this times out or fails, do
128049fe536SJiawen Wu * not continue or we could be in for a very long wait while every
129049fe536SJiawen Wu * EEPROM read fails
130049fe536SJiawen Wu */
1319607a3e6SJiawen Wu status = wx_read_ee_hostif(wx, 0, &checksum);
132049fe536SJiawen Wu if (status) {
1339607a3e6SJiawen Wu wx_err(wx, "EEPROM read failed\n");
134049fe536SJiawen Wu return status;
135049fe536SJiawen Wu }
136049fe536SJiawen Wu
137049fe536SJiawen Wu checksum = 0;
1389607a3e6SJiawen Wu status = txgbe_calc_eeprom_checksum(wx, &checksum);
139049fe536SJiawen Wu if (status != 0)
140049fe536SJiawen Wu return status;
141049fe536SJiawen Wu
1429607a3e6SJiawen Wu status = wx_read_ee_hostif(wx, wx->eeprom.sw_region_offset +
143049fe536SJiawen Wu TXGBE_EEPROM_CHECKSUM, &read_checksum);
144049fe536SJiawen Wu if (status != 0)
145049fe536SJiawen Wu return status;
146049fe536SJiawen Wu
147049fe536SJiawen Wu /* Verify read checksum from EEPROM is the same as
148049fe536SJiawen Wu * calculated checksum
149049fe536SJiawen Wu */
150049fe536SJiawen Wu if (read_checksum != checksum) {
151049fe536SJiawen Wu status = -EIO;
1529607a3e6SJiawen Wu wx_err(wx, "Invalid EEPROM checksum\n");
153049fe536SJiawen Wu }
154049fe536SJiawen Wu
155049fe536SJiawen Wu /* If the user cares, return the calculated checksum */
156049fe536SJiawen Wu if (checksum_val)
157049fe536SJiawen Wu *checksum_val = checksum;
158049fe536SJiawen Wu
159049fe536SJiawen Wu return status;
160049fe536SJiawen Wu }
161049fe536SJiawen Wu
txgbe_reset_misc(struct wx * wx)162270a71e6SJiawen Wu static void txgbe_reset_misc(struct wx *wx)
163b0801256SJiawen Wu {
1649607a3e6SJiawen Wu wx_reset_misc(wx);
1659607a3e6SJiawen Wu txgbe_init_thermal_sensor_thresh(wx);
166b0801256SJiawen Wu }
167b0801256SJiawen Wu
168b0801256SJiawen Wu /**
169b0801256SJiawen Wu * txgbe_reset_hw - Perform hardware reset
170270a71e6SJiawen Wu * @wx: pointer to wx structure
171b0801256SJiawen Wu *
172b0801256SJiawen Wu * Resets the hardware by resetting the transmit and receive units, masks
173b0801256SJiawen Wu * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
174b0801256SJiawen Wu * reset.
175b0801256SJiawen Wu **/
txgbe_reset_hw(struct wx * wx)176270a71e6SJiawen Wu int txgbe_reset_hw(struct wx *wx)
177b0801256SJiawen Wu {
178b0801256SJiawen Wu int status;
179b0801256SJiawen Wu
180b0801256SJiawen Wu /* Call adapter stop to disable tx/rx and clear interrupts */
1819607a3e6SJiawen Wu status = wx_stop_adapter(wx);
182b0801256SJiawen Wu if (status != 0)
183b0801256SJiawen Wu return status;
184b0801256SJiawen Wu
18502b2a6f9SJiawen Wu if (wx->media_type != sp_media_copper) {
18602b2a6f9SJiawen Wu u32 val;
18702b2a6f9SJiawen Wu
1889843814fSJiawen Wu val = WX_MIS_RST_LAN_RST(wx->bus.func);
1899843814fSJiawen Wu wr32(wx, WX_MIS_RST, val | rd32(wx, WX_MIS_RST));
1909843814fSJiawen Wu WX_WRITE_FLUSH(wx);
191b0801256SJiawen Wu usleep_range(10, 100);
19202b2a6f9SJiawen Wu }
193b0801256SJiawen Wu
1949607a3e6SJiawen Wu status = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_LAN_SW_RST(wx->bus.func));
195b0801256SJiawen Wu if (status != 0)
196b0801256SJiawen Wu return status;
197b0801256SJiawen Wu
198270a71e6SJiawen Wu txgbe_reset_misc(wx);
199d21d2c7fSJiawen Wu
200*9224ade6SJiawen Wu wx_clear_hw_cntrs(wx);
201*9224ade6SJiawen Wu
202d21d2c7fSJiawen Wu /* Store the permanent mac address */
2039607a3e6SJiawen Wu wx_get_mac_addr(wx, wx->mac.perm_addr);
204d21d2c7fSJiawen Wu
205d21d2c7fSJiawen Wu /* Store MAC address from RAR0, clear receive address registers, and
206d21d2c7fSJiawen Wu * clear the multicast table. Also reset num_rar_entries to 128,
207d21d2c7fSJiawen Wu * since we modify this value when programming the SAN MAC address.
208d21d2c7fSJiawen Wu */
2099607a3e6SJiawen Wu wx->mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;
2109607a3e6SJiawen Wu wx_init_rx_addrs(wx);
211d21d2c7fSJiawen Wu
2129607a3e6SJiawen Wu pci_set_master(wx->pdev);
213b0801256SJiawen Wu
214b0801256SJiawen Wu return 0;
215b0801256SJiawen Wu }
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