Searched refs:tmp_adev (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_xgmi.c | 908 struct amdgpu_device *tmp_adev; in amdgpu_xgmi_initialize_hive_get_data_partition() local 911 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_initialize_hive_get_data_partition() 912 ret = psp_xgmi_initialize(&tmp_adev->psp, set_extended_data, false); in amdgpu_xgmi_initialize_hive_get_data_partition() 914 dev_err(tmp_adev->dev, in amdgpu_xgmi_initialize_hive_get_data_partition() 930 struct amdgpu_device *tmp_adev = NULL; in amdgpu_xgmi_add_device() local 984 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device() 986 if (tmp_adev != adev) { in amdgpu_xgmi_add_device() 987 top_info = &tmp_adev->psp.xgmi_context.top_info; in amdgpu_xgmi_add_device() 992 ret = amdgpu_xgmi_update_topology(hive, tmp_adev); in amdgpu_xgmi_add_device() 1012 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device() [all …]
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| H A D | sienna_cichlid.c | 221 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_restore_hwcontext() local 223 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_RESET_RECOVERY); in sienna_cichlid_mode2_restore_hwcontext() 224 dev_info(tmp_adev->dev, in sienna_cichlid_mode2_restore_hwcontext() 226 r = sienna_cichlid_mode2_restore_ip(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext() 234 amdgpu_register_gpu_instance(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext() 237 amdgpu_ras_resume(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext() 239 amdgpu_irq_gpu_reset_resume_helper(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext() 241 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_DEFAULT); in sienna_cichlid_mode2_restore_hwcontext() 242 r = amdgpu_ib_ring_tests(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext() 244 dev_err(tmp_adev->dev, in sienna_cichlid_mode2_restore_hwcontext()
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| H A D | smu_v13_0_10.c | 222 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_restore_hwcontext() local 224 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_RESET_RECOVERY); in smu_v13_0_10_mode2_restore_hwcontext() 225 dev_info(tmp_adev->dev, in smu_v13_0_10_mode2_restore_hwcontext() 227 r = smu_v13_0_10_mode2_restore_ip(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext() 231 amdgpu_register_gpu_instance(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext() 234 amdgpu_ras_resume(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext() 236 amdgpu_irq_gpu_reset_resume_helper(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext() 238 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_DEFAULT); in smu_v13_0_10_mode2_restore_hwcontext() 239 r = amdgpu_ib_ring_tests(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext() 241 dev_err(tmp_adev->dev, in smu_v13_0_10_mode2_restore_hwcontext()
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| H A D | amdgpu_device.c | 5029 struct amdgpu_device *tmp_adev = reset_context->reset_req_dev; in amdgpu_device_pre_asic_reset() local 5095 dev_info(tmp_adev->dev, "Dumping IP State\n"); in amdgpu_device_pre_asic_reset() 5097 for (i = 0; i < tmp_adev->num_ip_blocks; i++) in amdgpu_device_pre_asic_reset() 5098 if (tmp_adev->ip_blocks[i].version->funcs->dump_ip_state) in amdgpu_device_pre_asic_reset() 5099 tmp_adev->ip_blocks[i].version->funcs in amdgpu_device_pre_asic_reset() 5100 ->dump_ip_state((void *)&tmp_adev->ip_blocks[i]); in amdgpu_device_pre_asic_reset() 5101 dev_info(tmp_adev->dev, "Dumping IP State Completed\n"); in amdgpu_device_pre_asic_reset() 5120 struct amdgpu_device *tmp_adev; in amdgpu_device_reinit_after_reset() local 5140 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_device_reinit_after_reset() 5141 amdgpu_set_init_level(tmp_adev, init_level); in amdgpu_device_reinit_after_reset() [all …]
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