Lines Matching refs:tmp_adev
5726 struct amdgpu_device *tmp_adev = reset_context->reset_req_dev; in amdgpu_device_pre_asic_reset() local
5784 dev_info(tmp_adev->dev, "Dumping IP State\n"); in amdgpu_device_pre_asic_reset()
5786 for (i = 0; i < tmp_adev->num_ip_blocks; i++) in amdgpu_device_pre_asic_reset()
5787 if (tmp_adev->ip_blocks[i].version->funcs->dump_ip_state) in amdgpu_device_pre_asic_reset()
5788 tmp_adev->ip_blocks[i].version->funcs in amdgpu_device_pre_asic_reset()
5789 ->dump_ip_state((void *)&tmp_adev->ip_blocks[i]); in amdgpu_device_pre_asic_reset()
5790 dev_info(tmp_adev->dev, "Dumping IP State Completed\n"); in amdgpu_device_pre_asic_reset()
5809 struct amdgpu_device *tmp_adev; in amdgpu_device_reinit_after_reset() local
5829 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_device_reinit_after_reset()
5830 amdgpu_set_init_level(tmp_adev, init_level); in amdgpu_device_reinit_after_reset()
5833 amdgpu_ras_clear_err_state(tmp_adev); in amdgpu_device_reinit_after_reset()
5834 r = amdgpu_device_asic_init(tmp_adev); in amdgpu_device_reinit_after_reset()
5836 dev_warn(tmp_adev->dev, "asic atom init failed!"); in amdgpu_device_reinit_after_reset()
5838 dev_info(tmp_adev->dev, "GPU reset succeeded, trying to resume\n"); in amdgpu_device_reinit_after_reset()
5840 r = amdgpu_device_ip_resume_phase1(tmp_adev); in amdgpu_device_reinit_after_reset()
5844 vram_lost = amdgpu_device_check_vram_lost(tmp_adev); in amdgpu_device_reinit_after_reset()
5847 amdgpu_coredump(tmp_adev, false, vram_lost, reset_context->job); in amdgpu_device_reinit_after_reset()
5851 tmp_adev->dev, in amdgpu_device_reinit_after_reset()
5853 amdgpu_inc_vram_lost(tmp_adev); in amdgpu_device_reinit_after_reset()
5856 r = amdgpu_device_fw_loading(tmp_adev); in amdgpu_device_reinit_after_reset()
5861 tmp_adev->xcp_mgr); in amdgpu_device_reinit_after_reset()
5865 r = amdgpu_device_ip_resume_phase2(tmp_adev); in amdgpu_device_reinit_after_reset()
5869 if (tmp_adev->mman.buffer_funcs_ring->sched.ready) in amdgpu_device_reinit_after_reset()
5870 amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true); in amdgpu_device_reinit_after_reset()
5872 r = amdgpu_device_ip_resume_phase3(tmp_adev); in amdgpu_device_reinit_after_reset()
5877 amdgpu_device_fill_reset_magic(tmp_adev); in amdgpu_device_reinit_after_reset()
5883 amdgpu_register_gpu_instance(tmp_adev); in amdgpu_device_reinit_after_reset()
5886 tmp_adev->gmc.xgmi.num_physical_nodes > 1) in amdgpu_device_reinit_after_reset()
5887 amdgpu_xgmi_add_device(tmp_adev); in amdgpu_device_reinit_after_reset()
5889 r = amdgpu_device_ip_late_init(tmp_adev); in amdgpu_device_reinit_after_reset()
5893 drm_client_dev_resume(adev_to_drm(tmp_adev), false); in amdgpu_device_reinit_after_reset()
5905 if (!amdgpu_ras_is_rma(tmp_adev)) { in amdgpu_device_reinit_after_reset()
5907 amdgpu_ras_resume(tmp_adev); in amdgpu_device_reinit_after_reset()
5915 tmp_adev->gmc.xgmi.num_physical_nodes > 1) in amdgpu_device_reinit_after_reset()
5917 reset_context->hive, tmp_adev); in amdgpu_device_reinit_after_reset()
5924 amdgpu_set_init_level(tmp_adev, in amdgpu_device_reinit_after_reset()
5926 amdgpu_irq_gpu_reset_resume_helper(tmp_adev); in amdgpu_device_reinit_after_reset()
5927 r = amdgpu_ib_ring_tests(tmp_adev); in amdgpu_device_reinit_after_reset()
5929 dev_err(tmp_adev->dev, "ib ring test failed (%d).\n", r); in amdgpu_device_reinit_after_reset()
5936 tmp_adev->asic_reset_res = r; in amdgpu_device_reinit_after_reset()
5946 struct amdgpu_device *tmp_adev = NULL; in amdgpu_do_asic_reset() local
5951 tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device, in amdgpu_do_asic_reset()
5955 r = amdgpu_reset_perform_reset(tmp_adev, reset_context); in amdgpu_do_asic_reset()
5972 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_do_asic_reset()
5974 if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) { in amdgpu_do_asic_reset()
5976 &tmp_adev->xgmi_reset_work)) in amdgpu_do_asic_reset()
5979 r = amdgpu_asic_reset(tmp_adev); in amdgpu_do_asic_reset()
5982 dev_err(tmp_adev->dev, in amdgpu_do_asic_reset()
5984 r, adev_to_drm(tmp_adev)->unique); in amdgpu_do_asic_reset()
5991 list_for_each_entry(tmp_adev, device_list_handle, in amdgpu_do_asic_reset()
5993 if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) { in amdgpu_do_asic_reset()
5994 flush_work(&tmp_adev->xgmi_reset_work); in amdgpu_do_asic_reset()
5995 r = tmp_adev->asic_reset_res; in amdgpu_do_asic_reset()
6004 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_do_asic_reset()
6005 amdgpu_ras_reset_error_count(tmp_adev, in amdgpu_do_asic_reset()
6129 struct amdgpu_device *tmp_adev; in amdgpu_device_health_check() local
6132 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_device_health_check()
6133 ret |= amdgpu_device_bus_status_check(tmp_adev); in amdgpu_device_health_check()
6143 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_recovery_prepare() local
6152 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_device_recovery_prepare()
6153 list_add_tail(&tmp_adev->reset_list, device_list); in amdgpu_device_recovery_prepare()
6155 tmp_adev->shutdown = true; in amdgpu_device_recovery_prepare()
6157 tmp_adev->pcie_reset_ctx.in_link_reset = true; in amdgpu_device_recovery_prepare()
6177 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_recovery_get_reset_lock() local
6181 tmp_adev = in amdgpu_device_recovery_get_reset_lock()
6183 amdgpu_device_lock_reset_domain(tmp_adev->reset_domain); in amdgpu_device_recovery_get_reset_lock()
6189 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_recovery_put_reset_lock() local
6193 tmp_adev = in amdgpu_device_recovery_put_reset_lock()
6195 amdgpu_device_unlock_reset_domain(tmp_adev->reset_domain); in amdgpu_device_recovery_put_reset_lock()
6205 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_halt_activities() local
6209 list_for_each_entry(tmp_adev, device_list, reset_list) { in amdgpu_device_halt_activities()
6210 amdgpu_device_set_mp1_state(tmp_adev); in amdgpu_device_halt_activities()
6222 if (!amdgpu_device_suspend_display_audio(tmp_adev)) in amdgpu_device_halt_activities()
6223 tmp_adev->pcie_reset_ctx.audio_suspended = true; in amdgpu_device_halt_activities()
6225 amdgpu_ras_set_error_query_ready(tmp_adev, false); in amdgpu_device_halt_activities()
6227 cancel_delayed_work_sync(&tmp_adev->delayed_init_work); in amdgpu_device_halt_activities()
6229 amdgpu_amdkfd_pre_reset(tmp_adev, reset_context); in amdgpu_device_halt_activities()
6235 amdgpu_unregister_gpu_instance(tmp_adev); in amdgpu_device_halt_activities()
6237 drm_client_dev_suspend(adev_to_drm(tmp_adev), false); in amdgpu_device_halt_activities()
6242 amdgpu_device_ip_need_full_reset(tmp_adev)) in amdgpu_device_halt_activities()
6243 amdgpu_ras_suspend(tmp_adev); in amdgpu_device_halt_activities()
6246 struct amdgpu_ring *ring = tmp_adev->rings[i]; in amdgpu_device_halt_activities()
6256 atomic_inc(&tmp_adev->gpu_reset_counter); in amdgpu_device_halt_activities()
6264 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_asic_reset() local
6269 list_for_each_entry(tmp_adev, device_list, reset_list) { in amdgpu_device_asic_reset()
6271 tmp_adev->no_hw_access = true; in amdgpu_device_asic_reset()
6272 r = amdgpu_device_pre_asic_reset(tmp_adev, reset_context); in amdgpu_device_asic_reset()
6274 tmp_adev->no_hw_access = false; in amdgpu_device_asic_reset()
6277 dev_err(tmp_adev->dev, "GPU pre asic reset failed with err, %d for drm dev, %s ", in amdgpu_device_asic_reset()
6278 r, adev_to_drm(tmp_adev)->unique); in amdgpu_device_asic_reset()
6279 tmp_adev->asic_reset_res = r; in amdgpu_device_asic_reset()
6310 list_for_each_entry(tmp_adev, device_list, reset_list) { in amdgpu_device_asic_reset()
6317 amdgpu_device_stop_pending_resets(tmp_adev); in amdgpu_device_asic_reset()
6327 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_sched_resume() local
6331 list_for_each_entry(tmp_adev, device_list, reset_list) { in amdgpu_device_sched_resume()
6334 struct amdgpu_ring *ring = tmp_adev->rings[i]; in amdgpu_device_sched_resume()
6342 if (!drm_drv_uses_atomic_modeset(adev_to_drm(tmp_adev)) && !job_signaled) in amdgpu_device_sched_resume()
6343 drm_helper_resume_force_mode(adev_to_drm(tmp_adev)); in amdgpu_device_sched_resume()
6345 if (tmp_adev->asic_reset_res) in amdgpu_device_sched_resume()
6346 r = tmp_adev->asic_reset_res; in amdgpu_device_sched_resume()
6348 tmp_adev->asic_reset_res = 0; in amdgpu_device_sched_resume()
6356 !amdgpu_ras_eeprom_check_err_threshold(tmp_adev)) in amdgpu_device_sched_resume()
6357 dev_info(tmp_adev->dev, "GPU reset(%d) failed\n", in amdgpu_device_sched_resume()
6358 atomic_read(&tmp_adev->gpu_reset_counter)); in amdgpu_device_sched_resume()
6359 amdgpu_vf_error_put(tmp_adev, AMDGIM_ERROR_VF_GPU_RESET_FAIL, 0, r); in amdgpu_device_sched_resume()
6361 dev_info(tmp_adev->dev, "GPU reset(%d) succeeded!\n", atomic_read(&tmp_adev->gpu_reset_counter)); in amdgpu_device_sched_resume()
6362 if (amdgpu_acpi_smart_shift_update(tmp_adev, in amdgpu_device_sched_resume()
6364 dev_warn(tmp_adev->dev, in amdgpu_device_sched_resume()
6376 struct amdgpu_device *tmp_adev = NULL; in amdgpu_device_gpu_resume() local
6378 list_for_each_entry(tmp_adev, device_list, reset_list) { in amdgpu_device_gpu_resume()
6380 if (!need_emergency_restart && !amdgpu_sriov_vf(tmp_adev)) in amdgpu_device_gpu_resume()
6381 amdgpu_amdkfd_post_reset(tmp_adev); in amdgpu_device_gpu_resume()
6389 if (tmp_adev->pcie_reset_ctx.audio_suspended) in amdgpu_device_gpu_resume()
6390 amdgpu_device_resume_display_audio(tmp_adev); in amdgpu_device_gpu_resume()
6392 amdgpu_device_unset_mp1_state(tmp_adev); in amdgpu_device_gpu_resume()
6394 amdgpu_ras_set_error_query_ready(tmp_adev, true); in amdgpu_device_gpu_resume()
6966 struct amdgpu_device *tmp_adev; in amdgpu_pci_slot_reset() local
7011 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_pci_slot_reset()
7012 tmp_adev->pcie_reset_ctx.in_link_reset = true; in amdgpu_pci_slot_reset()
7013 list_add_tail(&tmp_adev->reset_list, &device_list); in amdgpu_pci_slot_reset()
7029 list_for_each_entry(tmp_adev, &device_list, reset_list) in amdgpu_pci_slot_reset()
7030 amdgpu_device_unset_mp1_state(tmp_adev); in amdgpu_pci_slot_reset()
7056 struct amdgpu_device *tmp_adev = NULL; in amdgpu_pci_resume() local
7069 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_pci_resume()
7070 tmp_adev->pcie_reset_ctx.in_link_reset = false; in amdgpu_pci_resume()
7071 list_add_tail(&tmp_adev->reset_list, &device_list); in amdgpu_pci_resume()