Searched refs:ppc64 (Results 1 – 19 of 19) sorted by relevance
25 ppc ppc64 ppc64le115 ppc64) echo powerpc64;;
36 # ppc64 | powerpc | 64 bits big endian132 QEMU_ARCH_ppc64le = ppc64
19 ppc64*)
145 TEST_START IF ${RUN} == ppc || ${RUN} == ppc64 || ${DO_DEFAULT}
93 This is only useful on a few platforms (ppc64 and arm64). Since it
39 debarch=ppc64$(if_enabled_echo CONFIG_CPU_LITTLE_ENDIAN el)
177 QEMU_ARCH := ppc64187 QEMU_ARCH := ppc64
47 QEMU_BINARY=qemu-system-ppc64
172 } ppc64; member
97 <key word>=<value> pairs through a /proc/ppc64/lparcfg interface.
101 LIBUNWIND_LIBS := -lunwind -lunwind-ppc64128 LIBUNWIND_ARCHS:=aarch64 arm loongarch64 mips ppc32 ppc64 riscv s390x x86 x86_64
39 s390x, ppc64 and other architectures are likely to have
179 For most ia64, ppc64 and x86 users with lots of address space
40 ppc64 system. Physical hardware consoles per partition are not practical50 This driver was written to operate solely on IBM Power5 ppc64 hardware
2126 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; in kvm_arch_vcpu_ioctl_get_sregs_hv() 2127 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; in kvm_arch_vcpu_ioctl_get_sregs_hv() 2144 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { in kvm_arch_vcpu_ioctl_set_sregs_hv() 2145 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; in kvm_arch_vcpu_ioctl_set_sregs_hv() 2146 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; in kvm_arch_vcpu_ioctl_set_sregs_hv()
317 - ppc64662 ppc64: POWER5 (gr), 1656 MHz (SMT disabled, 1 virtual CPU per physical CPU)
845 * Bug fix for ppc64 EEH MMIO panic - always do readl after1657 ppc64 to remove build errors that were cropping up when
752 For most arm64, ppc64 and x86 users with lots of address space