Searched refs:pll2 (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| H A D | nv04.c | 208 uint32_t pll2 = (oldpll2 & 0x7fff0000) | 1 << 31 | pv->NM2; in setPLL_double_highregs() local 218 pll2 = 0; in setPLL_double_highregs() 227 pll2 |= 0x011f; in setPLL_double_highregs() 233 if (oldpll1 == pll1 && oldpll2 == pll2) in setPLL_double_highregs() 266 nvkm_wr32(device, reg2, pll2); in setPLL_double_highregs()
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| /linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | hw.c | 133 uint32_t pll2, struct nvkm_pll_vals *pllvals) in nouveau_hw_decode_pll() argument 144 pllvals->NM1 = pll2 & 0xffff; in nouveau_hw_decode_pll() 147 pllvals->NM2 = pll2 >> 16; in nouveau_hw_decode_pll() 150 if (nv_two_reg_pll(dev) && pll2 & NV31_RAMDAC_ENABLE_VCO2) in nouveau_hw_decode_pll() 151 pllvals->NM2 = pll2 & 0xffff; in nouveau_hw_decode_pll() 170 uint32_t reg1, pll1, pll2 = 0; in nouveau_hw_get_pllvals() local 180 pll2 = nvif_rd32(device, reg1 + 4); in nouveau_hw_get_pllvals() 184 pll2 = nvif_rd32(device, reg2); in nouveau_hw_get_pllvals() 193 pll2 = 0; in nouveau_hw_get_pllvals() 196 pll2 = 0; in nouveau_hw_get_pllvals() [all …]
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| /linux/drivers/clk/sunxi/ |
| H A D | Makefile | 12 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-a10-pll2.o
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| /linux/drivers/clk/mxs/ |
| H A D | clk-imx28.c | 133 ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, enumerator 170 clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); in mx28_clocks_init()
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-nomadik-stn8815.dtsi | 242 pll2: pll2@0 { label 253 clocks = <&pll2>; 268 clocks = <&pll2>; 276 clocks = <&pll2>;
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| /linux/Documentation/devicetree/bindings/display/ti/ |
| H A D | ti,dra7-dss.txt | 24 'pll1', 'pll2_clkctrl', 'pll2'
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | dra74x.dtsi | 139 "pll2_clkctrl", "pll2";
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | ums512.dtsi | 297 pll2: clock-controller@0 { label
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