Home
last modified time | relevance | path

Searched refs:ioread32 (Results 1 – 25 of 292) sorted by relevance

12345678910>>...12

/linux/drivers/net/ethernet/dec/tulip/
H A Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway()
56 int phy_reg = ioread32(ioaddr + 0xB8); in pnic_lnk_change()
61 if (ioread32(ioaddr + CSR5) & TPLnkFail) { in pnic_lnk_change()
62 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkFail) | TPLnkPass, ioaddr + CSR7); in pnic_lnk_change()
75 } else if (ioread32(ioaddr + CSR5) & TPLnkPass) { in pnic_lnk_change()
83 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkPass) | TPLnkFail, ioaddr + CSR7); in pnic_lnk_change()
94 if(!ioread32(ioaddr + CSR7)) { in pnic_timer()
109 int csr12 = ioread32(ioaddr + CSR12); in pnic_timer()
111 int phy_reg = ioread32(ioaddr + 0xB8); in pnic_timer()
112 int csr5 = ioread32(ioaddr + CSR5); in pnic_timer()
[all …]
H A Dpnic2.c88 ioread32(ioaddr + CSR12)); in pnic2_timer()
108 csr14 = (ioread32(ioaddr + CSR14) & 0xfff0ee39); in pnic2_start_nway()
135 tp->csr6 = ioread32(ioaddr + CSR6); in pnic2_start_nway()
163 csr12 = (ioread32(ioaddr + CSR12) & 0xffff8fff); in pnic2_start_nway()
177 int csr12 = ioread32(ioaddr + CSR12); in pnic2_lnk_change()
182 csr12, csr5, ioread32(ioaddr + CSR14)); in pnic2_lnk_change()
241 csr14 = (ioread32(ioaddr + CSR14) & 0xffffff7f); in pnic2_lnk_change()
253 tp->csr6 = (ioread32(ioaddr + CSR6) & 0xfe3bd1fd); in pnic2_lnk_change()
272 ioread32(ioaddr + CSR6), in pnic2_lnk_change()
273 ioread32(ioaddr + CSR12)); in pnic2_lnk_change()
[all …]
H A Dtimer.c23 u32 csr12 = ioread32(ioaddr + CSR12); in tulip_media_task()
30 ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR6), in tulip_media_task()
31 csr12, ioread32(ioaddr + CSR13), in tulip_media_task()
32 ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15)); in tulip_media_task()
49 ioread32(ioaddr + CSR6), in tulip_media_task()
149 ioread32(ioaddr + CSR12)); in mxic_timer()
H A Dmedia.c23 #define mdio_delay() ioread32(mdio_addr)
62 return ioread32(ioaddr + comet_miireg2offset[location]); in tulip_mdio_read()
69 ioread32(ioaddr + 0xA0); in tulip_mdio_read()
70 ioread32(ioaddr + 0xA0); in tulip_mdio_read()
73 if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000)) in tulip_mdio_read()
100 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0); in tulip_mdio_read()
132 if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000)) in tulip_mdio_write()
263 ioread32(ioaddr + CSR15); in tulip_select_media()
277 ioread32(ioaddr + CSR15); /* flush posted writes */ in tulip_select_media()
290 ioread32(ioaddr + CSR12); in tulip_select_media()
[all …]
H A D21142.c34 int csr12 = ioread32(ioaddr + CSR12); in t21142_media_task()
37 int csr14 = ioread32(ioaddr + CSR14); in t21142_media_task()
143 int csr12 = ioread32(ioaddr + CSR12); in t21142_lnk_change()
144 int csr14 = ioread32(ioaddr + CSR14); in t21142_lnk_change()
207 ioread32(ioaddr + CSR5)); in t21142_lnk_change()
212 tp->csr6, ioread32(ioaddr + CSR6), in t21142_lnk_change()
213 ioread32(ioaddr + CSR12)); in t21142_lnk_change()
/linux/drivers/rtc/
H A Drtc-asm9260.c120 isr = ioread32(priv->iobase + HW_CIIR); in asm9260_rtc_irq()
141 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
142 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
143 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
145 if (ctime1 != ioread32(priv->iobase + HW_CTIME1)) { in asm9260_rtc_read_time()
150 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
151 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
152 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
195 alrm->time.tm_year = ioread32(priv->iobase + HW_ALYEAR); in asm9260_rtc_read_alarm()
196 alrm->time.tm_mon = ioread32(priv->iobase + HW_ALMON); in asm9260_rtc_read_alarm()
[all …]
/linux/drivers/net/wwan/t7xx/
H A Dt7xx_dpmaif.c32 readx_poll_timeout_atomic(ioread32, addr, val, cond, delay_us, timeout_us)
74 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0); in t7xx_dpmaif_init_intr()
138 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMR0); in t7xx_update_dlq_intr()
177 ip_busy_sts = ioread32(hw_info->pcie_base + DPMAIF_AP_IP_BUSY); in t7xx_dpmaif_clr_ip_busy_sts()
350 rx_intr_status = ioread32(hw_info->pcie_base + DPMAIF_AP_APDL_L2TISAR0); in t7xx_dpmaif_hw_get_intr_cnt()
351 rx_intr_qdone = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_APDL_L2TIMR0); in t7xx_dpmaif_hw_get_intr_cnt()
358 tx_intr_status = ioread32(hw_info->pcie_base + DPMAIF_AP_L2TISAR0); in t7xx_dpmaif_hw_get_intr_cnt()
359 tx_intr_qdone = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMR0); in t7xx_dpmaif_hw_get_intr_cnt()
398 value = ioread32(hw_info->pcie_base + DPMAIF_AP_MEM_CLR); in t7xx_dpmaif_sram_init()
430 ap_port_mode = ioread32(hw_info->pcie_base + DPMAIF_AO_DL_RDY_CHK_THRES); in t7xx_dpmaif_hw_config()
[all …]
H A Dt7xx_cldma.c32 val = ioread32(hw_info->ap_pdn_base + REG_CLDMA_IP_BUSY); in t7xx_cldma_clear_ip_busy()
47 ul_cfg = ioread32(hw_info->ap_pdn_base + REG_CLDMA_UL_CFG); in t7xx_cldma_hw_restore()
89 val = ioread32(ao_base + REG_INFRA_RST2_SET); in t7xx_cldma_hw_reset()
92 val = ioread32(ao_base + REG_INFRA_RST4_SET); in t7xx_cldma_hw_reset()
97 val = ioread32(ao_base + REG_INFRA_RST4_CLR); in t7xx_cldma_hw_reset()
100 val = ioread32(ao_base + REG_INFRA_RST2_CLR); in t7xx_cldma_hw_reset()
143 val = ioread32(reg); in t7xx_cldma_hw_queue_status()
152 ch_id = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2TISAR0); in t7xx_cldma_hw_tx_done()
156 ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2TISAR0); in t7xx_cldma_hw_tx_done()
163 ch_id = ioread32(hw_info->ap_pdn_base + REG_CLDMA_L2RISAR0); in t7xx_cldma_hw_rx_done()
[all …]
/linux/drivers/uio/
H A Duio_mf624.c39 iowrite32(ioread32(INTCSR_reg) in mf624_disable_interrupt()
45 iowrite32(ioread32(INTCSR_reg) in mf624_disable_interrupt()
52 iowrite32(ioread32(INTCSR_reg) in mf624_disable_interrupt()
67 iowrite32(ioread32(INTCSR_reg) in mf624_enable_interrupt()
73 iowrite32(ioread32(INTCSR_reg) in mf624_enable_interrupt()
80 iowrite32(ioread32(INTCSR_reg) in mf624_enable_interrupt()
92 if ((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE) in mf624_irq_handler()
93 && (ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS)) { in mf624_irq_handler()
98 if ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE) in mf624_irq_handler()
99 && (ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS)) { in mf624_irq_handler()
/linux/drivers/usb/fotg210/
H A Dfotg210-udc.c34 u32 value = ioread32(fotg210->reg + offset); in fotg210_ack_int()
42 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); in fotg210_disable_fifo_int()
53 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); in fotg210_enable_fifo_int()
64 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); in fotg210_set_cxdone()
104 val = ioread32(fotg210->reg + FOTG210_EPMAP); in fotg210_fifo_ep_mapping()
110 val = ioread32(fotg210->reg + FOTG210_FIFOMAP); in fotg210_fifo_ep_mapping()
116 val = ioread32(fotg210->reg + FOTG210_FIFOCF); in fotg210_fifo_ep_mapping()
126 val = ioread32(fotg210->reg + FOTG210_FIFOMAP); in fotg210_set_fifo_dir()
136 val = ioread32(fotg210->reg + FOTG210_FIFOCF); in fotg210_set_tfrtype()
149 val = ioread32(fotg210->reg + offset); in fotg210_set_mps()
[all …]
/linux/drivers/w1/masters/
H A Damd_axi_w1.c113 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_READY) == 0) { in amd_axi_w1_touch_bit()
132 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_DONE) != 1) { in amd_axi_w1_touch_bit()
140 val = (u8)(ioread32(amd_axi_w1_local->base_addr + AXIW1_DATA_REG) & AXIW1_READDATA); in amd_axi_w1_touch_bit()
161 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_READY) == 0) { in amd_axi_w1_read_byte()
175 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_DONE) != 1) { in amd_axi_w1_read_byte()
182 val = (u8)(ioread32(amd_axi_w1_local->base_addr + AXIW1_DATA_REG) & 0x000000FF); in amd_axi_w1_read_byte()
202 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_READY) == 0) { in amd_axi_w1_write_byte()
216 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_DONE) != 1) { in amd_axi_w1_write_byte()
243 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_READY) == 0) { in amd_axi_w1_reset_bus()
256 while ((ioread32(amd_axi_w1_local->base_addr + AXIW1_STAT_REG) & AXIW1_DONE) != 1) { in amd_axi_w1_reset_bus()
[all …]
/linux/drivers/char/hw_random/
H A Diproc-rng200.c51 val = ioread32(rng_base + RNG_CTRL_OFFSET); in iproc_rng200_enable_set()
70 val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET); in iproc_rng200_restart()
74 val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET); in iproc_rng200_restart()
78 val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET); in iproc_rng200_restart()
82 val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET); in iproc_rng200_restart()
105 status = ioread32(priv->base + RNG_INT_STATUS_OFFSET); in iproc_rng200_read()
117 if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) & in iproc_rng200_read()
122 *(uint32_t *)buf = ioread32(priv->base + in iproc_rng200_read()
128 uint32_t rnd_number = ioread32(priv->base + in iproc_rng200_read()
/linux/drivers/ata/
H A Dsata_rcar.c185 val = ioread32(base + SATAPHYACK_REG); in sata_rcar_gen1_phy_write()
247 u16 data = ioread32(reg); in sata_rcar_ioread16_rep()
263 return ioread32(ap->ioaddr.status_addr); in sata_rcar_check_status()
268 return ioread32(ap->ioaddr.altstatus_addr); in sata_rcar_check_altstatus()
298 nsect = ioread32(ioaddr->nsect_addr); in sata_rcar_ata_devchk()
299 lbal = ioread32(ioaddr->lbal_addr); in sata_rcar_ata_devchk()
398 tf->error = ioread32(ioaddr->error_addr); in sata_rcar_tf_read()
399 tf->nsect = ioread32(ioaddr->nsect_addr); in sata_rcar_tf_read()
400 tf->lbal = ioread32(ioaddr->lbal_addr); in sata_rcar_tf_read()
401 tf->lbam = ioread32(ioaddr->lbam_addr); in sata_rcar_tf_read()
[all …]
/linux/drivers/gpio/
H A Dgpio-pch.c109 reg_val = ioread32(&chip->reg->po); in pch_gpio_set()
125 return !!(ioread32(&chip->reg->pi) & BIT(nr)); in pch_gpio_get()
138 reg_val = ioread32(&chip->reg->po); in pch_gpio_direction_output()
145 pm = ioread32(&chip->reg->pm); in pch_gpio_direction_output()
162 pm = ioread32(&chip->reg->pm); in pch_gpio_direction_input()
176 chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); in pch_gpio_save_reg_conf()
177 chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); in pch_gpio_save_reg_conf()
178 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); in pch_gpio_save_reg_conf()
179 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); in pch_gpio_save_reg_conf()
180 chip->pch_gpio_reg.im0_reg = ioread32(&chip->reg->im0); in pch_gpio_save_reg_conf()
[all …]
H A Dgpio-ml-ioh.c104 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set()
120 return !!(ioread32(&chip->reg->regs[chip->ch].pi) & BIT(nr)); in ioh_gpio_get()
132 pm = ioread32(&chip->reg->regs[chip->ch].pm); in ioh_gpio_direction_output()
137 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_direction_output()
156 pm = ioread32(&chip->reg->regs[chip->ch].pm); in ioh_gpio_direction_input()
174 ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_save_reg_conf()
176 ioread32(&chip->reg->regs[chip->ch].pm); in ioh_gpio_save_reg_conf()
178 ioread32(&chip->reg->regs[chip->ch].ien); in ioh_gpio_save_reg_conf()
180 ioread32(&chip->reg->regs[chip->ch].imask); in ioh_gpio_save_reg_conf()
182 ioread32(&chip->reg->regs[chip->ch].im_0); in ioh_gpio_save_reg_conf()
[all …]
/linux/drivers/clocksource/
H A Dtimer-econet-en751221.c62 return ioread32(reg_ctl(cpu_id)) & ctl_bit_pending(cpu_id); in cevt_is_pending()
76 iowrite32(ioread32(reg_count(cpu)), reg_compare(cpu)); in cevt_interrupt()
87 next = ioread32(reg_count(cpu)) + delta; in cevt_set_next_event()
90 if ((s32)(next - ioread32(reg_count(cpu))) < ECONET_MIN_DELTA / 2) in cevt_set_next_event()
103 reg = ioread32(reg_ctl(cpu)) | ctl_bit_enabled(cpu); in cevt_init_cpu()
118 return (u64)ioread32(reg_count(0)); in sched_clock_read()
/linux/arch/powerpc/platforms/86xx/
H A Dgef_sbc310.c99 reg = ioread32(sbc310_regs); in gef_sbc310_get_board_id()
108 reg = ioread32(sbc310_regs); in gef_sbc310_get_pcb_rev()
117 reg = ioread32(sbc310_regs); in gef_sbc310_get_board_rev()
126 reg = ioread32(sbc310_regs); in gef_sbc310_get_fpga_rev()
/linux/drivers/iio/adc/
H A Dnpcm_adc.c105 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_isr()
121 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_read()
130 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_read()
148 *val = ioread32(info->regs + NPCM_ADCDATA); in npcm_adc_read()
240 reg_con = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_probe()
254 reg_con = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_probe()
280 reg_con = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_probe()
322 regtemp = ioread32(info->regs + NPCM_ADCCON); in npcm_adc_remove()
/linux/drivers/media/pci/cobalt/
H A Dcobalt-irq.c50 uint32_t stat = ioread32(&vmr->irq_status); in cobalt_dma_stream_queue_handler()
53 if (!(ioread32(&vmr->status) & in cobalt_dma_stream_queue_handler()
61 if (ioread32(&clkloss->status) & in cobalt_dma_stream_queue_handler()
72 ioread32(&vmr->vactive_area) != s->timings.bt.height || in cobalt_dma_stream_queue_handler()
73 ioread32(&vmr->hactive_area) != s->timings.bt.width) { in cobalt_dma_stream_queue_handler()
84 if (!(ioread32(&cvi->status) & M00389_STATUS_BITMAP_LOCK_MSK)) { in cobalt_dma_stream_queue_handler()
107 if (ioread32(&fw->status) & M00473_STATUS_BITMAP_FREEWHEEL_MODE_MSK) { in cobalt_dma_stream_queue_handler()
H A Dcobalt-omnitek.c67 u32 header = ioread32(CAPABILITY_HEADER); in show_dma_capability()
68 u32 capa = ioread32(CAPABILITY_REGISTER); in show_dma_capability()
88 u32 status = ioread32(CS_REG(i)); in show_dma_capability()
109 if (ioread32(CS_REG(s->dma_channel)) & DONE) in is_dma_done()
125 u32 capa = ioread32(CAPABILITY_REGISTER); in omni_sg_dma_init()
136 u32 status = ioread32(CS_REG(i)); in omni_sg_dma_init()
137 u32 ctrl = ioread32(CS_REG(i)); in omni_sg_dma_init()
/linux/drivers/scsi/fnic/
H A Dvnic_wq_copy.c26 if (!(ioread32(&wq->ctrl->running))) in vnic_wq_copy_disable()
33 wq->index, ioread32(&wq->ctrl->fetch_index), in vnic_wq_copy_disable()
34 ioread32(&wq->ctrl->posted_index)); in vnic_wq_copy_disable()
43 BUG_ON(ioread32(&wq->ctrl->enable)); in vnic_wq_copy_clean()
/linux/drivers/watchdog/
H A Dof_xilinx_wdt.c63 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_start()
85 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_stop()
108 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_keepalive()
139 timer_value1 = ioread32(xdev->base + XWT_TBR_OFFSET); in xwdt_selftest()
140 timer_value2 = ioread32(xdev->base + XWT_TBR_OFFSET); in xwdt_selftest()
145 timer_value2 = ioread32(xdev->base + XWT_TBR_OFFSET); in xwdt_selftest()
/linux/drivers/input/serio/
H A Darc_ps2.c54 status = ioread32(port->status_addr); in arc_ps2_check_rx()
58 data = ioread32(port->data_addr) & 0xff; in arc_ps2_check_rx()
94 status = ioread32(port->status_addr); in arc_ps2_write()
121 iowrite32(ioread32(port->status_addr) & ~PS2_STAT_RX_INT_EN, in arc_ps2_close()
145 val = ioread32(addr); in arc_ps2_inhibit_ports()
205 id = ioread32(arc_ps2->addr); in arc_ps2_probe()
/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_mmio.c73 cp_cap = ioread32(ipc_mmio->base + ipc_mmio->offset.cp_capability); in ipc_mmio_update_cp_capability()
155 return (enum ipc_mem_exec_stage)ioread32(ipc_mmio->base + in ipc_mmio_get_exec_stage()
172 return (enum ipc_mem_device_ipc_state)ioread32(ipc_mmio->base + in ipc_mmio_get_ipc_state()
181 return (enum rom_exit_code)ioread32(ipc_mmio->base + in ipc_mmio_get_rom_exit_code()
224 return ioread32(ipc_mmio->base + ipc_mmio->offset.cp_version); in ipc_mmio_get_cp_version()
/linux/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_main.c278 adr1a = ioread32(&hw->reg->mac_adr[0].high); in pch_gbe_mac_read_mac_addr()
279 adr1b = ioread32(&hw->reg->mac_adr[0].low); in pch_gbe_mac_read_mac_addr()
302 if (readx_poll_timeout_atomic(ioread32, reg, tmp, !(tmp & bit), 0, 10)) in pch_gbe_wait_clr_bit()
327 adrmask = ioread32(&hw->reg->ADDR_MASK); in pch_gbe_mac_mar_set()
360 rctl = ioread32(&hw->reg->MAC_RX_EN); in pch_gbe_disable_mac_rx()
368 rctl = ioread32(&hw->reg->MAC_RX_EN); in pch_gbe_enable_mac_rx()
409 rx_fctrl = ioread32(&hw->reg->RX_FCTRL); in pch_gbe_mac_force_mac_fc()
438 ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable); in pch_gbe_mac_force_mac_fc()
453 wu_evt, ioread32(&hw->reg->ADDR_MASK)); in pch_gbe_mac_set_wol_event()
457 addr_mask = ioread32(&hw->reg->ADDR_MASK); in pch_gbe_mac_set_wol_event()
[all …]

12345678910>>...12