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Searched refs:infracfg (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/soc/mediatek/
H A Dmtk-infracfg.c28 int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_set_bus_protection() argument
35 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, in mtk_infracfg_set_bus_protection()
38 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); in mtk_infracfg_set_bus_protection()
40 ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1, in mtk_infracfg_set_bus_protection()
59 int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_clear_bus_protection() argument
66 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); in mtk_infracfg_clear_bus_protection()
68 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask); in mtk_infracfg_clear_bus_protection()
70 ret = regmap_read_poll_timeout(infracfg, INFRA_TOPAXI_PROTECTSTA1, in mtk_infracfg_clear_bus_protection()
79 struct regmap *infracfg; in mtk_infracfg_init() local
87 infracfg = syscon_regmap_lookup_by_compatible("mediatek,mt8192-infracfg"); in mtk_infracfg_init()
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi75 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,
90 clocks = <&infracfg CLK_INFRA_MUX1_SEL>,
213 infracfg: infracfg@10000000 { label
214 compatible = "mediatek,mt7622-infracfg",
225 clocks = <&infracfg CLK_INFRA_PMIC_PD>, <&pwrap_clk>;
227 resets = <&infracfg MT7622_INFRA_PMIC_WRAP_RST>;
250 infracfg = <&infracfg>;
259 clocks = <&infracfg CLK_INFRA_IRRX_PD>,
306 clocks = <&infracfg CLK_INFRA_TRNG>;
625 clocks = <&infracfg CLK_INFRA_AUDIO_PD>,
[all …]
H A Dmt2712e.dtsi252 infracfg: clock-controller@10001000 { label
253 compatible = "mediatek,mt2712-infracfg", "syscon";
293 infracfg = <&infracfg>;
319 clocks = <&infracfg CLK_INFRA_AO_SPI1>;
330 clocks = <&infracfg CLK_INFRA_M4U>;
332 mediatek,infracfg = <&infracfg>;
348 clocks = <&infracfg CLK_INFRA_M4U>;
350 mediatek,infracfg = <&infracfg>;
663 <&infracfg CLK_INFRA_AO_SPI0>;
/linux/Documentation/devicetree/bindings/sound/
H A Dmtk-btcvsd-snd.txt7 - mediatek,infracfg: the phandles of INFRASYS
22 mediatek,infracfg = <&infrasys>;
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi81 infracfg: syscon@10000000 { label
82 compatible = "mediatek,mt7629-infracfg", "syscon";
102 infracfg = <&infracfg>;
133 clocks = <&infracfg CLK_INFRA_TRNG_PD>;
473 mediatek,infracfg = <&infracfg>;
H A Dmt8135.dtsi133 infracfg: infracfg@10001000 { label
136 compatible = "mediatek,mt8135-infracfg", "syscon";
184 resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
H A Dmt7623n.dtsi108 clocks = <&infracfg CLK_INFRA_M4U>;
132 clocks = <&infracfg CLK_INFRA_SMI>,
134 <&infracfg CLK_INFRA_SMI>;
259 clocks = <&infracfg CLK_INFRA_CEC>;
H A Dmt2701.dtsi132 infracfg: syscon@10001000 { label
133 compatible = "mediatek,mt2701-infracfg", "syscon";
155 infracfg = <&infracfg>;
192 clocks = <&infracfg CLK_INFRA_SMI>,
194 <&infracfg CLK_INFRA_SMI>;
222 clocks = <&infracfg CLK_INFRA_M4U>;
434 clocks = <&infracfg CLK_INFRA_AUDIO>,
/linux/drivers/clk/mediatek/
H A DMakefile5 obj-$(CONFIG_COMMON_CLK_MT6735) += clk-mt6735-apmixedsys.o clk-mt6735-infracfg.o clk-mt6735-pericfg…
26 obj-$(CONFIG_COMMON_CLK_MT6795) += clk-mt6795-apmixedsys.o clk-mt6795-infracfg.o \
55 clk-mt7622-infracfg.o
64 obj-$(CONFIG_COMMON_CLK_MT7981) += clk-mt7981-infracfg.o
68 obj-$(CONFIG_COMMON_CLK_MT7986) += clk-mt7986-infracfg.o
72 obj-$(CONFIG_COMMON_CLK_MT7988) += clk-mt7988-infracfg.o
82 obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173-apmixedsys.o clk-mt8173-infracfg.o \
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c656 afe_priv->infracfg = syscon_regmap_lookup_by_phandle(of_node, in mt8192_init_clock()
658 if (IS_ERR(afe_priv->infracfg)) { in mt8192_init_clock()
660 __func__, PTR_ERR(afe_priv->infracfg)); in mt8192_init_clock()
661 return PTR_ERR(afe_priv->infracfg); in mt8192_init_clock()
H A Dmt8192-afe-common.h134 struct regmap *infracfg; member
H A Dmt8192-afe-pcm.c2110 regmap_update_bits(afe_priv->infracfg, in mt8192_afe_runtime_resume()
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-afe-common.h146 struct regmap *infracfg; member
H A Dmt8186-afe-pcm.c2749 regmap_update_bits(afe_priv->infracfg, PERI_BUS_DCM_CTRL, BIT(29), BIT(29)); in mt8186_afe_runtime_resume()
/linux/drivers/iommu/
H A Dmtk_iommu.c1299 struct regmap *infracfg; in mtk_iommu_probe() local
1320 infracfg = syscon_regmap_lookup_by_phandle(dev->of_node, "mediatek,infracfg"); in mtk_iommu_probe()
1321 if (IS_ERR(infracfg)) { in mtk_iommu_probe()
1341 infracfg = syscon_regmap_lookup_by_compatible(p); in mtk_iommu_probe()
1342 if (IS_ERR(infracfg)) in mtk_iommu_probe()
1343 return PTR_ERR(infracfg); in mtk_iommu_probe()
1346 ret = regmap_read(infracfg, REG_INFRA_MISC, &val); in mtk_iommu_probe()
/linux/
H A DMAINTAINERS16565 F: drivers/clk/mediatek/clk-mt6735-infracfg.c
16573 F: include/dt-bindings/clock/mediatek,mt6735-infracfg.h
16579 F: include/dt-bindings/reset/mediatek,mt6735-infracfg.h