| /linux/drivers/regulator/ |
| H A D | wm831x-dcdc.c | 62 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_get_mode() local
63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode()
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode()
116 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_mode() local
117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode()
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode()
126 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_set_suspend_mode() local
127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode()
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode()
135 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); in wm831x_dcdc_get_status() local
[all …]
|
| H A D | tps65023-regulator.c | 171 int dcdc = rdev_get_id(dev); in tps65023_dcdc_get_voltage_sel() local
173 if (dcdc < TPS65023_DCDC_1 || dcdc > TPS65023_DCDC_3) in tps65023_dcdc_get_voltage_sel()
176 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_get_voltage_sel()
186 int dcdc = rdev_get_id(dev); in tps65023_dcdc_set_voltage_sel() local
188 if (dcdc != tps->driver_data->core_regulator) in tps65023_dcdc_set_voltage_sel()
|
| H A D | ltc3676.c | 77 int dcdc = rdev_get_id(rdev); in ltc3676_set_suspend_voltage() local
80 dev_dbg(dev, "%s id=%d uV=%d\n", __func__, dcdc, uV); in ltc3676_set_suspend_voltage()
96 int dcdc = rdev_get_id(rdev); in ltc3676_set_suspend_mode() local
98 dev_dbg(dev, "%s id=%d mode=%d\n", __func__, dcdc, mode); in ltc3676_set_suspend_mode()
122 int ret, dcdc = rdev_get_id(rdev); in ltc3676_set_voltage_sel() local
124 dev_dbg(dev, "%s id=%d selector=%d\n", __func__, dcdc, selector); in ltc3676_set_voltage_sel()
|
| /linux/drivers/leds/ |
| H A D | leds-wm8350.c | 101 ret = regulator_enable(led->dcdc); in wm8350_led_enable()
120 ret = regulator_disable(led->dcdc); in wm8350_led_disable()
129 ret = regulator_enable(led->dcdc); in wm8350_led_disable()
188 struct regulator *isink, *dcdc; in wm8350_led_probe() local
210 dcdc = devm_regulator_get(&pdev->dev, "led_vcc"); in wm8350_led_probe()
211 if (IS_ERR(dcdc)) { in wm8350_led_probe()
213 return PTR_ERR(dcdc); in wm8350_led_probe()
226 led->dcdc = dcdc; in wm8350_led_probe()
|
| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-firefly-core-3588j.dtsi | 178 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
191 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
204 vdd_log_s0: dcdc-reg3 {
218 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
231 vdd_ddr_s0: dcdc-reg5 {
245 vdd2_ddr_s3: dcdc-reg6 {
255 vcc_2v0_pldo_s3: dcdc-reg7 {
268 vcc_3v3_s3: dcdc-reg8 {
281 vddq_ddr_s0: dcdc-reg9 {
291 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588-firefly-icore-3588q.dtsi | 175 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
188 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
201 vdd_log_s0: dcdc-reg3 {
215 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
228 vdd_ddr_s0: dcdc-reg5 {
242 vdd2_ddr_s3: dcdc-reg6 {
252 vcc_2v0_pldo_s3: dcdc-reg7 {
265 vcc_3v3_s3: dcdc-reg8 {
278 vddq_ddr_s0: dcdc-reg9 {
288 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588-evb2-v10.dts | 312 vdd_gpu_s0: dcdc-reg1 {
328 vdd_npu_s0: dcdc-reg2 {
340 vdd_log_s0: dcdc-reg3 {
353 vdd_vdenc_s0: dcdc-reg4 {
366 vdd_gpu_mem_s0: dcdc-reg5 {
383 vdd_npu_mem_s0: dcdc-reg6 {
396 vcc_2v0_pldo_s3: dcdc-reg7 {
409 vdd_vdenc_mem_s0: dcdc-reg8 {
421 vdd2_ddr_s3: dcdc-reg9 {
430 vcc_1v1_nldo_s3: dcdc
[all...] |
| H A D | rk3588-armsom-lm7.dtsi | 189 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
202 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
215 vdd_log_s0: dcdc-reg3 {
229 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
242 vdd_ddr_s0: dcdc-reg5 {
256 vdd2_ddr_s3: dcdc-reg6 {
266 vcc_2v0_pldo_s3: dcdc-reg7 {
280 vcc_3v3_s3: dcdc-reg8 {
293 vddq_ddr_s0: dcdc-reg9 {
303 vcc_1v8_s3: dcdc-reg10 {
|
| H A D | rk3588-edgeble-neu6a-common.dtsi | 206 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
219 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
232 vdd_log_s0: dcdc-reg3 {
246 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
259 vdd_ddr_s0: dcdc-reg5 {
273 vdd2_ddr_s3: dcdc-reg6 {
283 vcc_2v0_pldo_s3: dcdc-reg7 {
297 vcc_3v3_s3: dcdc-reg8 {
310 vddq_ddr_s0: dcdc-reg9 {
320 vcc_1v8_s3: dcdc-reg10 {
|
| H A D | rk3588-fet3588-c.dtsi | 287 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
300 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
313 vdd_log_s0: dcdc-reg3 {
327 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
340 vdd_ddr_s0: dcdc-reg5 {
354 vdd2_ddr_s3: dcdc-reg6 {
364 vcc_2v0_pldo_s3: dcdc-reg7 {
378 vcc_3v3_s3: dcdc-reg8 {
391 vddq_ddr_s0: dcdc-reg9 {
401 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588-coolpi-cm5.dtsi | 388 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
401 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
414 vdd_log_s0: dcdc-reg3 {
428 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
441 vdd_ddr_s0: dcdc-reg5 {
455 vdd2_ddr_s3: dcdc-reg6 {
465 vcc_2v0_pldo_s3: dcdc-reg7 {
479 vcc_3v3_s3: dcdc-reg8 {
492 vddq_ddr_s0: dcdc-reg9 {
502 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588-toybrick-x0.dts | 389 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
402 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
415 vdd_log_s0: dcdc-reg3 {
429 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
442 vdd_ddr_s0: dcdc-reg5 {
456 vdd2_ddr_s3: dcdc-reg6 {
466 vcc_2v0_pldo_s3: dcdc-reg7 {
479 vcc_3v3_s3: dcdc-reg8 {
492 vddq_ddr_s0: dcdc-reg9 {
502 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588s-khadas-edge2.dts | 471 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
484 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
497 vdd_log_s0: dcdc-reg3 {
511 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
524 vdd_ddr_s0: dcdc-reg5 {
538 vdd2_ddr_s3: dcdc-reg6 {
548 vcc_2v0_pldo_s3: dcdc-reg7 {
562 vcc_3v3_s3: dcdc-reg8 {
575 vddq_ddr_s0: dcdc-reg9 {
585 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588-armsom-sige7.dts | 491 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
505 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
518 vdd_log_s0: dcdc-reg3 {
532 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
545 vdd_ddr_s0: dcdc-reg5 {
559 vdd2_ddr_s3: dcdc-reg6 {
569 vcc_2v0_pldo_s3: dcdc-reg7 {
583 vcc_3v3_s3: dcdc-reg8 {
596 vddq_ddr_s0: dcdc-reg9 {
606 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3582-radxa-e52c.dts | 441 vdd_gpu_s0: dcdc-reg1 {
454 vdd_cpu_lit_s0: dcdc-reg2 {
467 vdd_logic_s0: dcdc-reg3 {
481 vdd_vdenc_s0: dcdc-reg4 {
494 vdd_ddr_s0: dcdc-reg5 {
508 vdd2_ddr_s3: dcdc-reg6 {
518 vcc_2v0_pldo_s3: dcdc-reg7 {
531 vcc_3v3_s3: vcc_3v3_pmu: dcdc-reg8 {
544 vddq_ddr_s0: dcdc-reg9 {
554 vcc_1v8_s3: dcdc-reg10 {
|
| H A D | rk3588-h96-max-v58.dts | 495 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
508 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
521 vdd_log_s0: dcdc-reg3 {
535 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
548 vdd_ddr_s0: dcdc-reg5 {
562 vdd2_ddr_s3: dcdc-reg6 {
572 vcc_2v0_pldo_s3: dcdc-reg7 {
586 vcc_3v3_s3: dcdc-reg8 {
599 vddq_ddr_s0: dcdc-reg9 {
609 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588s-roc-pc.dts | 505 vdd_gpu_s0: dcdc-reg1 {
518 vdd_cpu_lit_s0: dcdc-reg2 {
531 vdd_log_s0: dcdc-reg3 {
545 vdd_vdenc_s0: dcdc-reg4 {
558 vdd_ddr_s0: dcdc-reg5 {
572 vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 {
584 vcc_2v0_pldo_s3: dcdc-reg7 {
598 vcc_3v3_s3: dcdc-reg8 {
611 vddq_ddr_s0: dcdc-reg9 {
621 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3576-100ask-dshanpi-a1.dts | 420 vdd_cpu_big_s0: dcdc-reg1 {
433 vdd_npu_s0: dcdc-reg2 {
445 vdd_cpu_lit_s0: dcdc-reg3 {
458 vcc_3v3_s3: dcdc-reg4 {
470 vdd_gpu_s0: dcdc-reg5 {
483 vddq_ddr_s0: dcdc-reg6 {
492 vdd_logic_s0: dcdc-reg7 {
503 vcc_1v8_s3: dcdc-reg8 {
515 vdd2_ddr_s3: dcdc-reg9 {
524 vdd_ddr_s0: dcdc
[all...] |
| H A D | rk3588-orangepi-5.dtsi | 509 vdd_gpu_s0: dcdc-reg1 {
522 vdd_cpu_lit_s0: dcdc-reg2 {
535 vdd_log_s0: dcdc-reg3 {
549 vdd_vdenc_s0: dcdc-reg4 {
562 vdd_ddr_s0: dcdc-reg5 {
576 vdd2_ddr_s3: dcdc-reg6 {
586 vcc_2v0_pldo_s3: dcdc-reg7 {
600 vcc_3v3_s3: dcdc-reg8 {
613 vddq_ddr_s0: dcdc-reg9 {
623 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3588s-odroid-m2.dts | 601 vdd_gpu_s0: dcdc-reg1 {
614 vdd_cpu_lit_s0: dcdc-reg2 {
627 vdd_logic_s0: dcdc-reg3 {
641 vdd_vdenc_s0: dcdc-reg4 {
654 vdd_ddr_s0: dcdc-reg5 {
668 vdd2_ddr_s3: dcdc-reg6 {
678 vcc_2v0_pldo_s3: dcdc-reg7 {
692 vcc_3v3_s3: dcdc-reg8 {
705 vddq_ddr_s0: dcdc-reg9 {
715 vcc_1v8_s3: dcdc
[all...] |
| H A D | rk3576-nanopi-m5.dts | 468 vdd_cpu_big_s0: dcdc-reg1 {
482 vdd_npu_s0: dcdc-reg2 {
495 vdd_cpu_lit_s0: dcdc-reg3 {
509 vcc_3v3_s3: dcdc-reg4 {
522 vdd_gpu_s0: dcdc-reg5 {
536 vddq_ddr_s0: dcdc-reg6 {
546 vdd_logic_s0: dcdc-reg7 {
558 vcc_1v8_s3: dcdc-reg8 {
571 vdd2_ddr_s3: dcdc-reg9 {
581 vdd_ddr_s0: dcdc
[all...] |
| H A D | rk3588s-indiedroid-nova.dts | 705 vdd_gpu_s0: dcdc-reg1 {
717 vdd_cpu_lit_s0: dcdc-reg2 {
729 vdd_logic_s0: dcdc-reg3 {
742 vdd_vdenc_s0: dcdc-reg4 {
754 vdd_ddr_s0: dcdc-reg5 {
767 vdd2_ddr_s3: dcdc-reg6 {
778 vcc_2v0_pldo_s3: dcdc-reg7 {
790 vcc_3v3_s3: dcdc-reg8 {
802 vddq_ddr_s0: dcdc-reg9 {
813 vcc_1v8_s3: dcdc
[all...] |
| /linux/include/linux/mfd/wm8350/ |
| H A D | pmic.h | 723 struct regulator *dcdc; member
752 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
758 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
760 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | tps65090.txt | 11 dcdc[1-3], fet[1-7] and ldo[1-2] respectively.
19 - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
57 dcdc-ext-control-gpios = <&gpio 10 0>;
|
| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-seeed-npi.dtsi | 13 reg_dcdc_3v3: regulator-dcdc-3v3 {
39 reg_dcdc_1v8: regulator-dcdc-1v8 {
|