xref: /linux/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts (revision 2f24482304ebd32c5aa374f31465b9941a860b92)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/leds/common.h>
8#include <dt-bindings/soc/rockchip,vop2.h>
9#include "rk3588.dtsi"
10
11/ {
12	model = "H96 Max V58 TV Box";
13	compatible = "haochuangyi,h96-max-v58", "rockchip,rk3588";
14
15	aliases {
16		ethernet0 = &gmac1;
17		mmc0 = &sdhci;
18	};
19
20	adc-keys {
21		compatible = "adc-keys";
22		io-channels = <&saradc 1>;
23		io-channel-names = "buttons";
24		keyup-threshold-microvolt = <1800000>;
25		poll-interval = <100>;
26
27		button-function {
28			label = "Reset";
29			linux,code = <KEY_VENDOR>;
30			press-threshold-microvolt = <1750>;
31		};
32	};
33
34	chosen {
35		stdout-path = "serial2:1500000n8";
36	};
37
38	hdmi0-con {
39		compatible = "hdmi-connector";
40		type = "a";
41
42		port {
43			hdmi0_con_in: endpoint {
44				remote-endpoint = <&hdmi0_out_con>;
45			};
46		};
47	};
48
49	ir-receiver {
50		compatible = "gpio-ir-receiver";
51		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
52		pinctrl-names = "default";
53		pinctrl-0 = <&ir_receiver_pin>;
54	};
55
56	leds {
57		compatible = "gpio-leds";
58		pinctrl-names = "default";
59		pinctrl-0 = <&led_pins>;
60
61		led {
62			color = <LED_COLOR_ID_BLUE>;
63			function = LED_FUNCTION_STATUS;
64			gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
65			linux,default-trigger = "heartbeat";
66		};
67	};
68
69	vcc_1v1_nldo_s3: regulator-1v1 {
70		compatible = "regulator-fixed";
71		regulator-name = "vcc_1v1_nldo_s3";
72		regulator-always-on;
73		regulator-boot-on;
74		regulator-min-microvolt = <1100000>;
75		regulator-max-microvolt = <1100000>;
76		vin-supply = <&vcc5v0_sys>;
77	};
78
79	pcie_3v3: regulator-3v3-pcie {
80		compatible = "regulator-fixed";
81		enable-active-high;
82		gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
83		pinctrl-0 = <&pcie2_0_pow>;
84		pinctrl-names = "default";
85		regulator-name = "pcie_3v3";
86		regulator-min-microvolt = <3300000>;
87		regulator-max-microvolt = <3300000>;
88		vin-supply = <&vcc5v0_sys>;
89	};
90
91	wl_en_3v3: regulator-3v3-wlen {
92		compatible = "regulator-fixed";
93		enable-active-high;
94		gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
95		pinctrl-0 = <&wl_en>;
96		pinctrl-names = "default";
97		/*
98		 * Needs to be brought up before the PCIe driver is probed,
99		 * otherwise detecting the WLAN module requires rescanning
100		 * the bus, and even then it fails half of the time during
101		 * firmware load
102		 */
103		regulator-always-on;
104		regulator-boot-on;
105		regulator-name = "wl_en_3v3";
106		regulator-min-microvolt = <3300000>;
107		regulator-max-microvolt = <3300000>;
108		vin-supply = <&vcc5v0_sys>;
109	};
110
111	vcc5v0_host: regulator-5v0-host {
112		compatible = "regulator-fixed";
113		regulator-name = "vcc5v0_host";
114		regulator-min-microvolt = <5000000>;
115		regulator-max-microvolt = <5000000>;
116		enable-active-high;
117		gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
118		pinctrl-0 = <&vcc5v0_host_en>;
119		pinctrl-names = "default";
120		vin-supply = <&vcc5v0_sys>;
121	};
122
123	vcc5v0_otg: regulator-5v0-otg {
124		compatible = "regulator-fixed";
125		regulator-name = "vcc5v0_otg";
126		regulator-min-microvolt = <5000000>;
127		regulator-max-microvolt = <5000000>;
128		enable-active-high;
129		gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
130		pinctrl-0 = <&vcc5v0_otg_en>;
131		pinctrl-names = "default";
132		vin-supply = <&vcc5v0_sys>;
133	};
134
135	vcc5v0_sys: regulator-5v0-sys {
136		compatible = "regulator-fixed";
137		regulator-name = "vcc5v0_sys";
138		regulator-always-on;
139		regulator-boot-on;
140		regulator-min-microvolt = <5000000>;
141		regulator-max-microvolt = <5000000>;
142	};
143
144	spdif_dit: spdif-dit {
145		compatible = "linux,spdif-dit";
146		#sound-dai-cells = <0>;
147	};
148
149	spdif_sound: spdif-sound {
150		compatible = "simple-audio-card";
151		simple-audio-card,name = "SPDIF";
152
153		simple-audio-card,cpu {
154			sound-dai = <&spdif_tx0>;
155		};
156
157		simple-audio-card,codec {
158			sound-dai = <&spdif_dit>;
159		};
160	};
161};
162
163&combphy0_ps {
164	status = "okay";
165};
166
167&combphy1_ps {
168	status = "okay";
169};
170
171&combphy2_psu {
172	status = "okay";
173};
174
175&cpu_b0 {
176	cpu-supply = <&vdd_cpu_big0_s0>;
177};
178
179&cpu_b1 {
180	cpu-supply = <&vdd_cpu_big0_s0>;
181};
182
183&cpu_b2 {
184	cpu-supply = <&vdd_cpu_big1_s0>;
185};
186
187&cpu_b3 {
188	cpu-supply = <&vdd_cpu_big1_s0>;
189};
190
191&cpu_l0 {
192	cpu-supply = <&vdd_cpu_lit_s0>;
193};
194
195&cpu_l1 {
196	cpu-supply = <&vdd_cpu_lit_s0>;
197};
198
199&cpu_l2 {
200	cpu-supply = <&vdd_cpu_lit_s0>;
201};
202
203&cpu_l3 {
204	cpu-supply = <&vdd_cpu_lit_s0>;
205};
206
207&gpu {
208	mali-supply = <&vdd_gpu_s0>;
209	status = "okay";
210};
211
212&hdmi0 {
213	status = "okay";
214};
215
216&hdmi0_in {
217	hdmi0_in_vp0: endpoint {
218		remote-endpoint = <&vp0_out_hdmi0>;
219	};
220};
221
222&hdmi0_out {
223	hdmi0_out_con: endpoint {
224		remote-endpoint = <&hdmi0_con_in>;
225	};
226};
227
228&hdptxphy0 {
229	status = "okay";
230};
231
232&i2c0 {
233	pinctrl-names = "default";
234	pinctrl-0 = <&i2c0m2_xfer>;
235	status = "okay";
236
237	vdd_cpu_big0_s0: regulator@42 {
238		compatible = "rockchip,rk8602";
239		reg = <0x42>;
240		fcs,suspend-voltage-selector = <1>;
241		regulator-name = "vdd_cpu_big0_s0";
242		regulator-always-on;
243		regulator-boot-on;
244		regulator-min-microvolt = <550000>;
245		regulator-max-microvolt = <1050000>;
246		regulator-ramp-delay = <2300>;
247		vin-supply = <&vcc5v0_sys>;
248
249		regulator-state-mem {
250			regulator-off-in-suspend;
251		};
252	};
253
254	vdd_cpu_big1_s0: regulator@43 {
255		compatible = "rockchip,rk8603", "rockchip,rk8602";
256		reg = <0x43>;
257		fcs,suspend-voltage-selector = <1>;
258		regulator-name = "vdd_cpu_big1_s0";
259		regulator-always-on;
260		regulator-boot-on;
261		regulator-min-microvolt = <550000>;
262		regulator-max-microvolt = <1050000>;
263		regulator-ramp-delay = <2300>;
264		vin-supply = <&vcc5v0_sys>;
265
266		regulator-state-mem {
267			regulator-off-in-suspend;
268		};
269	};
270};
271
272&i2c6 {
273	status = "okay";
274
275	hym8563: rtc@51 {
276		compatible = "haoyu,hym8563";
277		reg = <0x51>;
278		#clock-cells = <0>;
279		clock-output-names = "hym8563";
280		pinctrl-names = "default";
281		pinctrl-0 = <&hym8563_int>;
282		interrupt-parent = <&gpio0>;
283		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
284		wakeup-source;
285	};
286};
287
288&gmac1 {
289	clock_in_out = "output";
290	phy-handle = <&rgmii_phy1>;
291	phy-mode = "rgmii-id";
292	pinctrl-0 = <&gmac1_miim
293		     &gmac1_tx_bus2
294		     &gmac1_rx_bus2
295		     &gmac1_rgmii_clk
296		     &gmac1_rgmii_bus>;
297	pinctrl-names = "default";
298	status = "okay";
299};
300
301&mdio1 {
302	rgmii_phy1: ethernet-phy@1 {
303		/* RTL8211F */
304		compatible = "ethernet-phy-id001c.c916";
305		reg = <0x1>;
306		pinctrl-names = "default";
307		pinctrl-0 = <&rtl8211f_rst>;
308		reset-assert-us = <20000>;
309		reset-deassert-us = <100000>;
310		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
311	};
312};
313
314&pcie2x1l0 {
315	pinctrl-names = "default";
316	pinctrl-0 = <&pcie2_0_rst>;
317	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
318	status = "okay";
319
320	pcie@0,0 {
321		reg = <0x200000 0 0 0 0>;
322		#address-cells = <3>;
323		#size-cells = <2>;
324		ranges;
325		device_type = "pci";
326		bus-range = <0x20 0x2f>;
327
328		wifi: wifi@0,0 {
329			compatible = "pci14e4,449d";
330			reg = <0x210000 0 0 0 0>;
331			clocks = <&hym8563>;
332			clock-names = "lpo";
333		};
334	};
335};
336
337&pd_gpu {
338	domain-supply = <&vdd_gpu_s0>;
339};
340
341&pinctrl {
342	hym8563 {
343		hym8563_int: hym8563-int {
344			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
345		};
346	};
347
348	ir-receiver {
349		ir_receiver_pin: ir-receiver-pin {
350			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
351		};
352	};
353
354	leds {
355		led_pins: led-pins {
356			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
357		};
358	};
359
360	pcie2 {
361		pcie2_0_rst: pcie2-0-rst {
362			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
363		};
364
365		pcie2_0_pow: pcie2-0-pow {
366			rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
367		};
368	};
369
370	rtl8211f {
371		rtl8211f_rst: rtl8211f-rst {
372			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
373		};
374
375	};
376
377	usb {
378		vcc5v0_host_en: vcc5v0-host-en {
379			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
380		};
381
382		vcc5v0_otg_en: vcc5v0-otg-en {
383			rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
384		};
385	};
386
387	wifibt {
388		wl_en: wl-en {
389			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
390		};
391
392		wl_wake_host: wl-wake-host {
393			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
394		};
395
396		bt_en: bt-en {
397			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
398		};
399
400		bt_wake: bt-wake {
401			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
402		};
403
404		bt_wake_host: bt-wake-host {
405			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
406		};
407	};
408};
409
410&saradc {
411	vref-supply = <&avcc_1v8_s0>;
412	status = "okay";
413};
414
415&sdhci {
416	bus-width = <8>;
417	no-sdio;
418	no-sd;
419	non-removable;
420	mmc-hs400-1_8v;
421	mmc-hs400-enhanced-strobe;
422	status = "okay";
423};
424
425&spdif_tx0 {
426	pinctrl-names = "default";
427	pinctrl-0 = <&spdif0m1_tx>;
428	status = "okay";
429};
430
431&spi2 {
432	assigned-clocks = <&cru CLK_SPI2>;
433	assigned-clock-rates = <200000000>;
434	num-cs = <1>;
435	pinctrl-names = "default";
436	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
437	status = "okay";
438
439	pmic@0 {
440		compatible = "rockchip,rk806";
441		reg = <0x0>;
442		interrupt-parent = <&gpio0>;
443		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
444		pinctrl-names = "default";
445		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
446			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
447		spi-max-frequency = <1000000>;
448		system-power-controller;
449
450		vcc1-supply = <&vcc5v0_sys>;
451		vcc2-supply = <&vcc5v0_sys>;
452		vcc3-supply = <&vcc5v0_sys>;
453		vcc4-supply = <&vcc5v0_sys>;
454		vcc5-supply = <&vcc5v0_sys>;
455		vcc6-supply = <&vcc5v0_sys>;
456		vcc7-supply = <&vcc5v0_sys>;
457		vcc8-supply = <&vcc5v0_sys>;
458		vcc9-supply = <&vcc5v0_sys>;
459		vcc10-supply = <&vcc5v0_sys>;
460		vcc11-supply = <&vcc_2v0_pldo_s3>;
461		vcc12-supply = <&vcc5v0_sys>;
462		vcc13-supply = <&vcc_1v1_nldo_s3>;
463		vcc14-supply = <&vcc_1v1_nldo_s3>;
464		vcca-supply = <&vcc5v0_sys>;
465
466		gpio-controller;
467		#gpio-cells = <2>;
468
469		rk806_dvs1_null: dvs1-null-pins {
470			pins = "gpio_pwrctrl1";
471			function = "pin_fun0";
472		};
473
474		rk806_dvs2_null: dvs2-null-pins {
475			pins = "gpio_pwrctrl2";
476			function = "pin_fun0";
477		};
478
479		rk806_dvs3_null: dvs3-null-pins {
480			pins = "gpio_pwrctrl3";
481			function = "pin_fun0";
482		};
483
484		regulators {
485			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
486				regulator-name = "vdd_gpu_s0";
487				regulator-boot-on;
488				regulator-min-microvolt = <550000>;
489				regulator-max-microvolt = <950000>;
490				regulator-ramp-delay = <12500>;
491				regulator-enable-ramp-delay = <400>;
492
493				regulator-state-mem {
494					regulator-off-in-suspend;
495				};
496			};
497
498			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
499				regulator-name = "vdd_cpu_lit_s0";
500				regulator-always-on;
501				regulator-boot-on;
502				regulator-min-microvolt = <550000>;
503				regulator-max-microvolt = <950000>;
504				regulator-ramp-delay = <12500>;
505
506				regulator-state-mem {
507					regulator-off-in-suspend;
508				};
509			};
510
511			vdd_log_s0: dcdc-reg3 {
512				regulator-name = "vdd_log_s0";
513				regulator-always-on;
514				regulator-boot-on;
515				regulator-min-microvolt = <675000>;
516				regulator-max-microvolt = <750000>;
517				regulator-ramp-delay = <12500>;
518
519				regulator-state-mem {
520					regulator-off-in-suspend;
521					regulator-suspend-microvolt = <750000>;
522				};
523			};
524
525			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
526				regulator-name = "vdd_vdenc_s0";
527				regulator-always-on;
528				regulator-boot-on;
529				regulator-min-microvolt = <550000>;
530				regulator-max-microvolt = <950000>;
531				regulator-ramp-delay = <12500>;
532
533				regulator-state-mem {
534					regulator-off-in-suspend;
535				};
536			};
537
538			vdd_ddr_s0: dcdc-reg5 {
539				regulator-name = "vdd_ddr_s0";
540				regulator-always-on;
541				regulator-boot-on;
542				regulator-min-microvolt = <675000>;
543				regulator-max-microvolt = <900000>;
544				regulator-ramp-delay = <12500>;
545
546				regulator-state-mem {
547					regulator-off-in-suspend;
548					regulator-suspend-microvolt = <850000>;
549				};
550			};
551
552			vdd2_ddr_s3: dcdc-reg6 {
553				regulator-name = "vdd2_ddr_s3";
554				regulator-always-on;
555				regulator-boot-on;
556
557				regulator-state-mem {
558					regulator-on-in-suspend;
559				};
560			};
561
562			vcc_2v0_pldo_s3: dcdc-reg7 {
563				regulator-name = "vdd_2v0_pldo_s3";
564				regulator-always-on;
565				regulator-boot-on;
566				regulator-min-microvolt = <2000000>;
567				regulator-max-microvolt = <2000000>;
568				regulator-ramp-delay = <12500>;
569
570				regulator-state-mem {
571					regulator-on-in-suspend;
572					regulator-suspend-microvolt = <2000000>;
573				};
574			};
575
576			vcc_3v3_s3: dcdc-reg8 {
577				regulator-name = "vcc_3v3_s3";
578				regulator-always-on;
579				regulator-boot-on;
580				regulator-min-microvolt = <3300000>;
581				regulator-max-microvolt = <3300000>;
582
583				regulator-state-mem {
584					regulator-on-in-suspend;
585					regulator-suspend-microvolt = <3300000>;
586				};
587			};
588
589			vddq_ddr_s0: dcdc-reg9 {
590				regulator-name = "vddq_ddr_s0";
591				regulator-always-on;
592				regulator-boot-on;
593
594				regulator-state-mem {
595					regulator-off-in-suspend;
596				};
597			};
598
599			vcc_1v8_s3: dcdc-reg10 {
600				regulator-name = "vcc_1v8_s3";
601				regulator-always-on;
602				regulator-boot-on;
603				regulator-min-microvolt = <1800000>;
604				regulator-max-microvolt = <1800000>;
605
606				regulator-state-mem {
607					regulator-on-in-suspend;
608					regulator-suspend-microvolt = <1800000>;
609				};
610			};
611
612			avcc_1v8_s0: pldo-reg1 {
613				regulator-name = "avcc_1v8_s0";
614				regulator-always-on;
615				regulator-boot-on;
616				regulator-min-microvolt = <1800000>;
617				regulator-max-microvolt = <1800000>;
618
619				regulator-state-mem {
620					regulator-off-in-suspend;
621				};
622			};
623
624			vcc_1v8_s0: pldo-reg2 {
625				regulator-name = "vcc_1v8_s0";
626				regulator-always-on;
627				regulator-boot-on;
628				regulator-min-microvolt = <1800000>;
629				regulator-max-microvolt = <1800000>;
630
631				regulator-state-mem {
632					regulator-off-in-suspend;
633					regulator-suspend-microvolt = <1800000>;
634				};
635			};
636
637			avdd_1v2_s0: pldo-reg3 {
638				regulator-name = "avdd_1v2_s0";
639				regulator-always-on;
640				regulator-boot-on;
641				regulator-min-microvolt = <1200000>;
642				regulator-max-microvolt = <1200000>;
643
644				regulator-state-mem {
645					regulator-off-in-suspend;
646				};
647			};
648
649			vcc_3v3_s0: pldo-reg4 {
650				regulator-name = "vcc_3v3_s0";
651				regulator-always-on;
652				regulator-boot-on;
653				regulator-min-microvolt = <3300000>;
654				regulator-max-microvolt = <3300000>;
655				regulator-ramp-delay = <12500>;
656
657				regulator-state-mem {
658					regulator-off-in-suspend;
659				};
660			};
661
662			vccio_sd_s0: pldo-reg5 {
663				regulator-name = "vccio_sd_s0";
664				regulator-always-on;
665				regulator-boot-on;
666				regulator-min-microvolt = <1800000>;
667				regulator-max-microvolt = <3300000>;
668				regulator-ramp-delay = <12500>;
669
670				regulator-state-mem {
671					regulator-off-in-suspend;
672				};
673			};
674
675			pldo6_s3: pldo-reg6 {
676				regulator-name = "pldo6_s3";
677				regulator-always-on;
678				regulator-boot-on;
679				regulator-min-microvolt = <1800000>;
680				regulator-max-microvolt = <1800000>;
681
682				regulator-state-mem {
683					regulator-on-in-suspend;
684					regulator-suspend-microvolt = <1800000>;
685				};
686			};
687
688			vdd_0v75_s3: nldo-reg1 {
689				regulator-name = "vdd_0v75_s3";
690				regulator-always-on;
691				regulator-boot-on;
692				regulator-min-microvolt = <750000>;
693				regulator-max-microvolt = <750000>;
694
695				regulator-state-mem {
696					regulator-on-in-suspend;
697					regulator-suspend-microvolt = <750000>;
698				};
699			};
700
701			vdd_ddr_pll_s0: nldo-reg2 {
702				regulator-name = "vdd_ddr_pll_s0";
703				regulator-always-on;
704				regulator-boot-on;
705				regulator-min-microvolt = <850000>;
706				regulator-max-microvolt = <850000>;
707
708				regulator-state-mem {
709					regulator-off-in-suspend;
710					regulator-suspend-microvolt = <850000>;
711				};
712			};
713
714			avdd_0v75_s0: nldo-reg3 {
715				regulator-name = "avdd_0v75_s0";
716				regulator-always-on;
717				regulator-boot-on;
718				regulator-min-microvolt = <750000>;
719				regulator-max-microvolt = <750000>;
720
721				regulator-state-mem {
722					regulator-off-in-suspend;
723				};
724			};
725
726			vdd_0v85_s0: nldo-reg4 {
727				regulator-name = "vdd_0v85_s0";
728				regulator-always-on;
729				regulator-boot-on;
730				regulator-min-microvolt = <850000>;
731				regulator-max-microvolt = <850000>;
732
733				regulator-state-mem {
734					regulator-off-in-suspend;
735				};
736			};
737
738			vdd_0v75_s0: nldo-reg5 {
739				regulator-name = "vdd_0v75_s0";
740				regulator-always-on;
741				regulator-boot-on;
742				regulator-min-microvolt = <750000>;
743				regulator-max-microvolt = <750000>;
744
745				regulator-state-mem {
746					regulator-off-in-suspend;
747				};
748			};
749		};
750	};
751};
752
753&tsadc {
754	status = "okay";
755};
756
757&u2phy0 {
758	status = "okay";
759};
760
761&u2phy0_otg {
762	phy-supply = <&vcc5v0_otg>;
763	status = "okay";
764};
765
766&u2phy1 {
767	status = "okay";
768};
769
770&u2phy1_otg {
771	phy-supply = <&vcc5v0_host>;
772	status = "okay";
773};
774
775&uart2 {
776	pinctrl-0 = <&uart2m0_xfer>;
777	status = "okay";
778};
779
780&uart9 {
781	pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn &uart9m0_rtsn>;
782	pinctrl-names = "default";
783	uart-has-rtscts;
784	status = "okay";
785
786	bluetooth {
787		compatible = "brcm,bcm43438-bt";
788		clocks = <&hym8563>;
789		clock-names = "lpo";
790		device-wakeup-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
791		interrupt-parent = <&gpio0>;
792		interrupts = <RK_PA0 IRQ_TYPE_EDGE_FALLING>;
793		pinctrl-0 = <&bt_en>, <&bt_wake_host>, <&bt_wake>;
794		pinctrl-names = "default";
795		shutdown-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
796	};
797};
798
799&usbdp_phy0 {
800	status = "okay";
801};
802
803&usbdp_phy1 {
804	status = "okay";
805};
806
807&usb_host0_xhci {
808	dr_mode = "host";
809	status = "okay";
810};
811
812&usb_host1_xhci {
813	dr_mode = "host";
814	status = "okay";
815};
816
817&vop_mmu {
818	status = "okay";
819};
820
821&vop {
822	status = "okay";
823};
824
825&vp0 {
826	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
827		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
828		remote-endpoint = <&hdmi0_in_vp0>;
829	};
830};
831