Home
last modified time | relevance | path

Searched refs:controller_id (Results 1 – 25 of 44) sorted by relevance

12

/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table2.h76 enum controller_id controller_id,
80 enum controller_id controller_id,
90 enum controller_id crtc_id,
H A Dcommand_table.h82 enum controller_id controller_id,
86 enum controller_id controller_id,
96 enum controller_id crtc_id,
H A Dcommand_table.c1023 if (CONTROLLER_ID_D1 != bp_params->controller_id) in set_pixel_clock_v3()
1056 uint8_t controller_id; in set_pixel_clock_v5() local
1063 bp_params->controller_id, &controller_id)) { in set_pixel_clock_v5()
1064 clk.sPCLKInput.ucCRTC = controller_id; in set_pixel_clock_v5()
1126 uint8_t controller_id; in set_pixel_clock_v6() local
1133 bp_params->controller_id, &controller_id)) { in set_pixel_clock_v6()
1153 clk.sPCLKInput.ulCrtcPclkFreq.ucCRTC = controller_id; in set_pixel_clock_v6()
1218 uint8_t controller_id; in set_pixel_clock_v7() local
1224 && bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &controller_id)) { in set_pixel_clock_v7()
1244 clk.ucCRTC = controller_id; in set_pixel_clock_v7()
[all …]
H A Dcommand_table_helper2.h41 enum controller_id id,
H A Dcommand_table_helper_struct.h35 bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_abm.c58 static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id, uint32_t panel_inst) in dce_abm_set_pipe() argument
75 MASTER_COMM_CMD_REG_BYTE1, controller_id); in dce_abm_set_pipe()
90 uint32_t controller_id, in dmcu_set_backlight_level() argument
103 dce_abm_set_pipe(&abm_dce->base, controller_id, panel_id); in dmcu_set_backlight_level()
113 if (controller_id == 0) in dmcu_set_backlight_level()
234 unsigned int controller_id, in dce_abm_set_backlight_level_pwm() argument
245 controller_id, in dce_abm_set_backlight_level_pwm()
H A Ddce_clock_source.c863 bp_pc_params.controller_id = pix_clk_params->controller_id; in dce110_program_pix_clk()
937 bp_pc_params.controller_id = pix_clk_params->controller_id; in dce112_program_pix_clk()
972 unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; in dcn31_program_pix_clk()
1016 bp_pc_params.controller_id = pix_clk_params->controller_id; in dcn31_program_pix_clk()
1074 unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; in dcn401_program_pix_clk()
1118 bp_pc_params.controller_id = pix_clk_params->controller_id; in dcn401_program_pix_clk()
1180 bp_pixel_clock_params.controller_id = CONTROLLER_ID_UNDEFINED; in dce110_clock_source_power_down()
1288 unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; in dcn20_program_pix_clk()
1334 unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; in dcn3_program_pix_clk()
H A Ddmub_abm.c174 unsigned int controller_id, in dmub_abm_set_backlight_level_pwm_ex() argument
/linux/drivers/gpu/drm/amd/display/include/
H A Dbios_parser_types.h137 enum controller_id controller_id; member
171 enum controller_id controller_id; member
219 enum controller_id controller_id; /* (Which CRTC uses this PLL) */ member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce112/
H A Ddce112_hwseq.c115 uint8_t controller_id, in dce112_enable_display_power_gating() argument
130 if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0) { in dce112_enable_display_power_gating()
133 dcb, controller_id + 1, cntl); in dce112_enable_display_power_gating()
139 HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id), in dce112_enable_display_power_gating()
/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_12_2_glymur.h404 .controller_id = MSM_DP_CONTROLLER_0,
412 .controller_id = MSM_DSI_CONTROLLER_0,
421 .controller_id = MSM_DSI_CONTROLLER_1,
430 .controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
438 .controller_id = MSM_DP_CONTROLLER_1,
446 .controller_id = MSM_DP_CONTROLLER_3,
454 .controller_id = MSM_DP_CONTROLLER_2,
462 .controller_id = MSM_DP_CONTROLLER_2, /* pair with intf_6 for DP MST */
470 .controller_id = MSM_DP_CONTROLLER_1, /* pair with intf_4 for DP MST */
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dabm.h42 bool (*set_pipe)(struct abm *abm, unsigned int controller_id, unsigned int panel_inst);
50 unsigned int controller_id,
/linux/drivers/scsi/aic94xx/
H A Daic94xx_sds.h66 struct controller_id { struct
85 struct controller_id contrl_id; /*PCI id to identify the controller */ argument
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h92 enum controller_id controller_id; member
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h101 enum controller_id controller_id; member
H A Ddce110_timing_generator.c146 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce110_timing_generator_enable_crtc()
238 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false); in dce110_timing_generator_disable_crtc()
307 bp_params.controller_id = tg110->controller_id; in dce110_timing_generator_program_timing_generator()
1805 switch (tg110->controller_id) { in dce110_timing_generator_disable_vga()
2346 tg110->controller_id = CONTROLLER_ID_D0 + instance; in dce110_timing_generator_construct()
/linux/drivers/soundwire/
H A Dslave.c47 bus->controller_id, bus->link_id, id->mfg_id, id->part_id, in sdw_slave_add()
52 bus->controller_id, bus->link_id, id->mfg_id, id->part_id, in sdw_slave_add()
H A Dmaster.c148 dev_set_name(&md->dev, "sdw-master-%d-%d", bus->controller_id, bus->link_id); in sdw_master_device_add()
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-peci10 What: /sys/bus/peci/devices/<controller_id>-<device_addr>/remove
/linux/sound/soc/sdca/
H A Dsdca_hid.c107 bus->controller_id, bus->link_id, sdw->id.mfg_id, in sdca_add_hid_device()
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder.c1441 enum dpu_intf_type type, u32 controller_id) in dpu_encoder_get_intf() argument
1450 && catalog->intf[i].controller_id == controller_id) { in dpu_encoder_get_intf()
2663 u32 controller_id = disp_info->h_tile_instance[i]; in dpu_encoder_setup_display() local
2675 i, controller_id, phys_params.split_role); in dpu_encoder_setup_display()
2679 controller_id); in dpu_encoder_setup_display()
2681 if (disp_info->intf_type == INTF_WB && controller_id < WB_MAX) in dpu_encoder_setup_display()
2682 phys_params.hw_wb = dpu_rm_get_wb(&dpu_kms->rm, controller_id); in dpu_encoder_setup_display()
H A Ddpu_hw_catalog.h517 u32 controller_id; member
/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_timing_generator.c251 tg110->controller_id = CONTROLLER_ID_D0 + instance; in dce60_timing_generator_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c209 uint8_t controller_id, in dce110_enable_display_power_gating() argument
225 if (controller_id == underlay_idx) in dce110_enable_display_power_gating()
226 controller_id = CONTROLLER_ID_UNDERLAY0 - 1; in dce110_enable_display_power_gating()
228 if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0) { in dce110_enable_display_power_gating()
231 dcb, controller_id + 1, cntl); in dce110_enable_display_power_gating()
240 if (controller_id < CONTROLLER_ID_MAX - 1) in dce110_enable_display_power_gating()
242 HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id), in dce110_enable_display_power_gating()
1260 enum audio_dto_source translate_to_dto_source(enum controller_id crtc_id) in translate_to_dto_source()
3192 uint32_t controller_id = pipe_ctx->stream_res.tg->inst + 1; in dce110_set_backlight_level() local
3207 controller_id, in dce110_set_backlight_level()
/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c151 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce120_timing_generator_enable_crtc()
393 switch (tg110->controller_id) { in dce120_timing_generator_disable_vga()
1261 tg110->controller_id = CONTROLLER_ID_D0 + instance; in dce120_timing_generator_construct()

12