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Searched refs:RB_NO_UPDATE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c956 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_dpg_mode()
1135 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start()
2081 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_0_start_sriov()
H A Dvcn_v2_5.c1111 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start_dpg_mode()
1301 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_start()
1524 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v2_5_sriov_start()
H A Dvcn_v3_0.c1142 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_dpg_mode()
1333 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start()
1523 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_NO_UPDATE, 1); in vcn_v3_0_start_sriov()
/linux/drivers/gpu/drm/radeon/
H A Drv770d.h352 #define RB_NO_UPDATE (1 << 27) macro
H A Dnid.h487 #define RB_NO_UPDATE (1 << 27) macro
H A Dcikd.h1306 #define RB_NO_UPDATE (1 << 27) macro
H A Drv770.c1102 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in rv770_cp_load_microcode()
H A Devergreend.h479 #define RB_NO_UPDATE (1 << 27) macro
H A Dr600d.h198 #define RB_NO_UPDATE (1 << 27) macro
H A Dr600.c2658 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in r600_cp_load_microcode()
2756 tmp |= RB_NO_UPDATE; in r600_cp_resume()