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Searched refs:PACKET3_PREAMBLE_END_CLEAR_STATE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvid.h270 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dgfx_v6_0.c2054 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v6_0_cp_gfx_start()
H A Dgfx_v7_0.c2512 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v7_0_cp_gfx_start()
H A Dgfx_v11_0.c3652 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v11_0_cp_gfx_start()
H A Dgfx_v10_0.c6413 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v10_0_cp_gfx_start()
/linux/drivers/gpu/drm/radeon/
H A Dnid.h1263 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dcikd.h1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Devergreend.h1658 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dni.c1559 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
H A Devergreen.c3033 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in evergreen_cp_start()