Searched refs:NUM_FCLK_DPM_LEVELS (Results 1 – 13 of 13) sorted by relevance
83 #define NUM_FCLK_DPM_LEVELS 8 macro111 uint32_t FclkClocks_Freq[NUM_FCLK_DPM_LEVELS];112 uint32_t FclkClocks_Voltage[NUM_FCLK_DPM_LEVELS];139 uint32_t FclkClocks_Freq[NUM_FCLK_DPM_LEVELS];140 uint32_t FclkClocks_Voltage[NUM_FCLK_DPM_LEVELS];
102 #define NUM_FCLK_DPM_LEVELS 4 macro113 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];
43 #define NUM_FCLK_DPM_LEVELS 8 macro58 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)426 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ];
107 #define NUM_FCLK_DPM_LEVELS 4 macro119 DpmClock_t FClocks[NUM_FCLK_DPM_LEVELS];
110 #define NUM_FCLK_DPM_LEVELS 4 macro138 df_pstate_t DfPstateTable[NUM_FCLK_DPM_LEVELS];
34 #define NUM_FCLK_DPM_LEVELS 8 macro302 uint32_t FidTableFclk[NUM_FCLK_DPM_LEVELS]; //PPCLK_FCLK303 uint8_t DidTableFclk[NUM_FCLK_DPM_LEVELS]; //PPCLK_FCLK
44 #define NUM_FCLK_DPM_LEVELS 8 macro1051 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz1129 …uint8_t FclkDpmUPstates[NUM_FCLK_DPM_LEVELS]; // U P-state ID associated with each FCLK DPM s…1130 …uint16_t FclkDpmVddU[NUM_FCLK_DPM_LEVELS]; // mV(Q2) Vset U voltage associated with each FCLK …1131 uint16_t FclkDpmUSpeed[NUM_FCLK_DPM_LEVELS]; //U speed associated with each FCLK DPM state1411 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
45 #define NUM_FCLK_DPM_LEVELS 8 macro1060 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz1131 …uint8_t FclkDpmUPstates[NUM_FCLK_DPM_LEVELS]; // U P-state ID associated with each FCLK DPM s…1132 …uint16_t FclkDpmVddU[NUM_FCLK_DPM_LEVELS]; // mV(Q2) Vset U voltage associated with each FCLK …1133 uint16_t FclkDpmUSpeed[NUM_FCLK_DPM_LEVELS]; //U speed associated with each FCLK DPM state1404 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
40 #define NUM_FCLK_DPM_LEVELS 8 macro50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)520 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
48 #define NUM_FCLK_DPM_LEVELS 8 macro67 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)691 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz1051 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
31 #define NUM_FCLK_DPM_LEVELS 4 macro
42 #define NUM_FCLK_DPM_LEVELS 8 macro1151 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz1636 uint16_t FreqTableFclk [NUM_FCLK_DPM_LEVELS ]; // In MHz
3620 PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_FCLK_DPM_LEVELS, in vega20_set_fclk_to_highest_dpm_level()